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Class Information
Number: 257/E21.069
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising selenium (se) or tellurium (te) (epo) > Preparation of substrate or foundation plate for se or te semiconductor (epo)
Description: This subclass is indented under subclass E21.068. This subclass is substantially the same in scope as ECLA classification H01L21/08.










Patents under this class:

Patent Number Title Of Patent Date Issued
8531019 Heat dissipation methods and structures for semiconductor device Sep. 10, 2013
8361880 Semiconductor light-emitting device with metal support substrate Jan. 29, 2013
8259464 Wafer level package (WLP) device having bump assemblies including a barrier metal Sep. 4, 2012
7906417 Compound semiconductor device with T-shaped gate electrode and its manufacture Mar. 15, 2011
7901980 Self-aligned in-contact phase change memory device Mar. 8, 2011
7674672 Fabricating process for substrate with embedded passive component Mar. 9, 2010
7525159 Turn-on-efficient bipolar structures for on-chip ESD protection Apr. 28, 2009
7498630 Nonvolatile semiconductor memory Mar. 3, 2009
7364937 Vertical elevated pore phase change memory Apr. 29, 2008
7312529 Structure and method for producing multiple size interconnections Dec. 25, 2007











 
 
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