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Browse by Category: Main > Physics
Class Information
Number: 257/E21.059
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising silicon carbide (sic) (epo) > Making n- or p- doped regions or layers, e.g., using diffusion (epo) > Using ion implantation (epo) > Angled implantation (epo)
Description: This subclass is indented under subclass E21.057. This subclass is substantially the same in scope as ECLA classification H01L21/04H4A12.










Patents under this class:

Patent Number Title Of Patent Date Issued
8492250 Method for fabricating semiconductor device Jul. 23, 2013
8334169 Integrated circuit packaging system and method of manufacture thereof Dec. 18, 2012
8252677 Method of forming solder bumps on substrates Aug. 28, 2012
8138576 Production method and production apparatus of tin or solder alloy for electronic components, and solder alloy Mar. 20, 2012
8110897 Semiconductor device with carbon-containing region Feb. 7, 2012
8039349 Methods for fabricating non-planar semiconductor devices having stress memory Oct. 18, 2011
7902031 Method for angular doping of source and drain regions for odd and even NAND blocks Mar. 8, 2011
7846821 Multi-angle rotation for ion implantation of trenches in superjunction devices Dec. 7, 2010
7790562 Method for angular doping of source and drain regions for odd and even NAND blocks Sep. 7, 2010
7759186 Method for fabricating junction termination extension with formation of photosensitive dopant mask to control doping profile and lateral width for high-voltage electronic devices Jul. 20, 2010
7749851 Semiconductor device and method for fabricating semiconductor device Jul. 6, 2010
7732310 Sidewall memory with self-aligned asymmetrical source and drain configuration Jun. 8, 2010
7704844 High performance MOSFET Apr. 27, 2010
7704864 Method of manufacturing a superjunction device with conventional terminations Apr. 27, 2010
7645700 Dry etchback of interconnect contacts Jan. 12, 2010
7534690 Non-volatile memory with asymmetrical doping profile May. 19, 2009
7524724 Method of forming titanium nitride layer and method of fabricating capacitor using the same Apr. 28, 2009
7504293 Fabrication method for semiconductor device Mar. 17, 2009
7285465 Method of manufacturing a SiC vertical MOSFET Oct. 23, 2007
7189588 Group III nitride semiconductor substrate and its manufacturing method Mar. 13, 2007
7101764 High-voltage transistor and fabrication process Sep. 5, 2006
7029969 Method of manufacture of a silicon carbide MOSFET including a masking with a tapered shape and implanting ions at an angle Apr. 18, 2006











 
 
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