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Class Information
Number: 257/E21.058
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising silicon carbide (sic) (epo) > Making n- or p- doped regions or layers, e.g., using diffusion (epo) > Using ion implantation (epo) > Using masks (epo)
Description: This subclass is indented under subclass E21.057. This subclass is substantially the same in scope as ECLA classification H01L21/04H4A10.










Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
8709957 Spalling utilizing stressor layer portions Apr. 29, 2014
8679922 Method of producing semiconductor device and method of producing solid-state image pickup device Mar. 25, 2014
8669623 Structure related to a thick bottom dielectric (TBD) for trench-gate devices Mar. 11, 2014
8664040 Exposing connectors in packages through selective treatment Mar. 4, 2014
8624313 Method of manufacturing semiconductor memory device Jan. 7, 2014
8624357 Composite semiconductor substrates for thin-film device layer transfer Jan. 7, 2014
8587041 Solid-state imaging device and method of manufacturing the same Nov. 19, 2013
8586475 Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same Nov. 19, 2013
8574926 Magnetic memory and manufacturing method thereof Nov. 5, 2013
8569185 Method of fabricating gate electrode using a treated hard mask Oct. 29, 2013
8569821 Semiconductor devices and methods of forming the same Oct. 29, 2013
8551836 Semiconductor device and method of manufacturing the same Oct. 8, 2013
8536031 Method of fabricating dual damascene structures using a multilevel multiple exposure patterning scheme Sep. 17, 2013
8530932 Replacement spacer for tunnel FETS Sep. 10, 2013
8525289 Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization Sep. 3, 2013
8524602 Method for forming vias in a substrate Sep. 3, 2013
8513717 Semiconductor device and method for manufacturing the same Aug. 20, 2013
8481381 Superior integrity of high-k metal gate stacks by preserving a resist material above end caps of gate electrode structures Jul. 9, 2013
8466064 Semiconductor integrated circuit device and method of manufacturing a semiconductor integrated circuit device Jun. 18, 2013
8455314 Transistors comprising high-K metal gate electrode structures and embedded strain-inducing semiconductor alloys formed in a late stage Jun. 4, 2013
8450122 Test structures and methods May. 28, 2013
8440536 Mask layout and method for forming vertical channel transistor in semiconductor device using the same May. 14, 2013
8441085 Method of manufacturing electronic apparatus and electronic apparatus May. 14, 2013
8426287 Method of manufacturing semiconductor device, solid-state imaging device, and solid-state imaging apparatus Apr. 23, 2013
8409982 Method of forming solid blind vias through the dielectric coating on high density interconnect (HDI) substrate materials Apr. 2, 2013
8405185 Semiconductor device and semiconductor module including the same Mar. 26, 2013
8389376 Air gap integration scheme Mar. 5, 2013
8390092 Area-efficient high voltage bipolar-based ESD protection targeting narrow design windows Mar. 5, 2013
8383522 Micro pattern forming method Feb. 26, 2013
8383497 Method for manufacturing solid-state image sensor Feb. 26, 2013
8372747 Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same Feb. 12, 2013
8324119 Enhancing deposition uniformity of a channel semiconductor alloy by an in situ etch process Dec. 4, 2012
8309460 Methods of manufacturing semiconductor devices Nov. 13, 2012
8263421 Manufacturing method of semiconductor device Sep. 11, 2012
8258052 Method of manufacturing silicon carbide semiconductor device Sep. 4, 2012
8252677 Method of forming solder bumps on substrates Aug. 28, 2012
8242005 Using multiple masks to form independent features on a workpiece Aug. 14, 2012
8232137 Heat conduction for chip stacks and 3-D circuits Jul. 31, 2012
8198192 Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization Jun. 12, 2012
8198194 Methods of forming p-channel field effect transistors having SiGe source/drain regions Jun. 12, 2012
8178400 Replacement spacer for tunnel FETs May. 15, 2012
8173527 Stepped masking for patterned implantation May. 8, 2012
8153463 Method of manufacturing thin film transistor substrate Apr. 10, 2012
8105961 Method and apparatus for using flex circuit technology to create a reference electrode channel Jan. 31, 2012
8101530 Lithography patterning method Jan. 24, 2012
8048787 Methods of forming semiconductor devices Nov. 1, 2011
8017457 Method of manufacturing semiconductor memory device Sep. 13, 2011
8008188 Method of forming solid blind vias through the dielectric coating on high density interconnect substrate materials Aug. 30, 2011
8003456 Method for producing a semiconductor component Aug. 23, 2011
7994061 Mask layout and method for forming vertical channel transistor in semiconductor device using the same Aug. 9, 2011

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