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Class Information
Number: 257/E21.05
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) > Device having semiconductor body comprising carbon, e.g., diamond, diamond-like carbon (epo) > Multistep processes for manufacture of device whose active layer, e.g., base, channel, comprises semiconducting carbon, e.g., diamond, diamond-like carbon (epo) > Device controllable only by electric current supplied or the electric potential applied to electrode which does not carry current to be rectified, amplified, or switched, e.g., three-terminal devices such as source, drain, and gate terminals; emitter, base, collector terminals (epo)
Description: This subclass is indented under subclass E21.049. This subclass is substantially the same in scope as ECLA classification H01L21/04D40B.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.051 Field-effect transistor (epo) 225


Patents under this class:

Patent Number Title Of Patent Date Issued
8093139 Method for fabrication of aligned nanowire structures in semiconductor materials for electronic, optoelectronic, photonic and plasmonic devices Jan. 10, 2012
8093630 Semiconductor device and lateral diffused metal-oxide-semiconductor transistor Jan. 10, 2012
7915097 Electronic module with conductivity transformation region, method of manufacture and applications thereof Mar. 29, 2011
7875469 Method of operating and process for fabricating an electron source Jan. 25, 2011
7858461 Semiconductor device and method of fabricating the same Dec. 28, 2010
7847325 Method of making discrete trap memory (DTM) mediated by fullerenes Dec. 7, 2010
7847293 Growth of reduced dislocation density non-polar gallium nitride Dec. 7, 2010
7829358 System and method for emitter layer shaping Nov. 9, 2010
7795125 System and process for producing nanowire composites and electronic substrates therefrom Sep. 14, 2010
7632726 Method for fabricating a nitride FET including passivation layers Dec. 15, 2009
7592980 Semiconductor device Sep. 22, 2009
7569449 Processes providing high and low threshold p-type and n-type transistors Aug. 4, 2009
7504284 Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices Mar. 17, 2009
7468315 System and process for producing nanowire composites and electronic substrates therefrom Dec. 23, 2008
7371617 Method for fabricating semiconductor package with heat sink May. 13, 2008
7262430 Organic photocurrent multiplication device Aug. 28, 2007
7164210 Semiconductor package with heat sink and method for fabricating same Jan. 16, 2007
5624853 Method for forming heterojunction bipolar transistors Apr. 29, 1997
5597762 Field-enhanced diffusion using optical activation Jan. 28, 1997
5536952 Heterojunction bipolar transistor Jul. 16, 1996











 
 
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