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Class Information
Number: 257/E21.038
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Making mask on semicond uctor body for further photolithographic processing (epo) > Comprising inorganic layer (epo) > Characterized by their size, orientation, disposition, behavior, shape, in horizontal or vertical plane (epo) > Characterized by process involved to create mask, e.g., lift-off mask, sidewalls, or to modify mask, such as pre-treatment, post-treatment (epo)
Description: This subclass is indented under subclass E21.036. This subclass is substantially the same in scope as ECLA classification H01L21/033F4.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8652964 Method and apparatus for the formation of an electronic device Feb. 18, 2014
8642428 Semiconductor device including line-type active region and method for manufacturing the same Feb. 4, 2014
8629064 Multiple patterning lithography using spacer and self-aligned assist patterns Jan. 14, 2014
8609489 Methods of forming memory; and methods of forming vertical structures Dec. 17, 2013
8609543 Method for manufacturing semiconductor device having multi-layered hard mask layer Dec. 17, 2013
8574971 Method of manufacturing a thin-film transistor and method of manufacturing a display substrate using the same Nov. 5, 2013
8569185 Method of fabricating gate electrode using a treated hard mask Oct. 29, 2013
8557675 Methods of patterning features in a structure using multiple sidewall image transfer technique Oct. 15, 2013
8541311 Integrated circuit fabrication methods utilizing embedded hardmask layers for high resolution patterning Sep. 24, 2013
8535753 Methods of forming carbon nanotubes Sep. 17, 2013
8461054 Method of manufacturing liquid crystal display device Jun. 11, 2013
8450214 Methods of etching single crystal silicon May. 28, 2013
8440569 Method of eliminating a lithography operation May. 14, 2013
8420499 Concave-convex pattern forming method and magnetic tunnel junction element forming method Apr. 16, 2013
8415240 Mesoscale pyramids, hole arrays and methods of preparation Apr. 9, 2013
8399350 Formation of air gap with protection of metal lines Mar. 19, 2013
8372740 Methods for increased array feature density Feb. 12, 2013
8338959 Simplified pitch doubling process flow Dec. 25, 2012
8324094 Semiconductor device and manufacturing method thereof Dec. 4, 2012
8304317 Gate line edge roughness reduction by using 2P/2E process together with high temperature bake Nov. 6, 2012
8304262 Wiggling control for pseudo-hardmask Nov. 6, 2012
8294246 Semiconductor structures including square cuts in single crystal silicon and method of forming same Oct. 23, 2012
8288272 Semiconductor device and manufacturing method thereof Oct. 16, 2012
8252659 Method for producing interconnect structures for integrated circuits Aug. 28, 2012
8241823 Method of fabrication of a semiconductor device having reduced pitch Aug. 14, 2012
8232211 Methods for self-aligned self-assembled patterning enhancement Jul. 31, 2012
8216949 Method for integrated circuit fabrication using pitch multiplication Jul. 10, 2012
8217465 Semiconductor constructions Jul. 10, 2012
8211803 Spacer process for on pitch contacts and related structures Jul. 3, 2012
8203176 Dielectric, capacitor using dielectric, semiconductor device using dielectric, and manufacturing method of dielectric Jun. 19, 2012
8193018 Patterning method for light-emitting devices Jun. 5, 2012
8183159 Device component forming method with a trim step prior to sidewall image transfer (SIT) processing May. 22, 2012
8163190 Method for fabricating a fine pattern Apr. 24, 2012
8153512 Patterning techniques Apr. 10, 2012
8114306 Method of forming sub-lithographic features using directed self-assembly of polymers Feb. 14, 2012
8114765 Methods for increased array feature density Feb. 14, 2012
8084347 Resist feature and removable spacer pitch doubling patterning method for pillar structures Dec. 27, 2011
8080443 Method of making pillars using photoresist spacer mask Dec. 20, 2011
8030222 Structures with increased photo-alignment margins Oct. 4, 2011
8018070 Semiconductor device, method for manufacturing semiconductor devices and mask systems used in the manufacturing of semiconductor devices Sep. 13, 2011
7989355 Method of pitch halving Aug. 2, 2011
7985682 Method of fabricating semiconductor device Jul. 26, 2011
7972926 Methods of forming memory cells; and methods of forming vertical structures Jul. 5, 2011
7972964 Semiconductor device with contact structure and manufacturing method thereof Jul. 5, 2011
7973388 Semiconductor structures including square cuts in single crystal silicon Jul. 5, 2011
7951682 Method for fabricating capacitor in semiconductor device May. 31, 2011
7947545 Method for producing a transistor gate with sub-photolithographic dimensions May. 24, 2011
7947589 FinFET formation with a thermal oxide spacer hard mask formed from crystalline silicon layer May. 24, 2011
7943462 Transistor including a high-K metal gate electrode structure formed prior to drain/source regions on the basis of a sacrificial carbon spacer May. 17, 2011
7935639 Process for increasing feature density during the manufacture of a semiconductor device May. 3, 2011

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