| |
 |
|
Class Information
Number: 257/E21.038
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Making mask on semicond uctor body for further photolithographic processing (epo) > Comprising inorganic layer (epo) > Characterized by their size, orientation, disposition, behavior, shape, in horizontal or vertical plane (epo) > Characterized by process involved to create mask, e.g., lift-off mask, sidewalls, or to modify mask, such as pre-treatment, post-treatment (epo)
Description: This subclass is indented under subclass E21.036. This subclass is substantially the same in scope as ECLA classification H01L21/033F4.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7622336 |
Manufacturing method of semiconductor device |
Nov. 24, 2009 |
| 7615496 |
Method of forming pad patterns using self-align double patterning method, pad pattern layout formed using the same, and method of forming contact holes using self-align double patterning metho |
Nov. 10, 2009 |
| 7611980 |
Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures |
Nov. 3, 2009 |
| 7601647 |
Method of forming fine patterns of semiconductor device using double patterning |
Oct. 13, 2009 |
| 7598104 |
Method of forming a metal contact and passivation of a semiconductor feature |
Oct. 6, 2009 |
| 7579282 |
Method for removing metal foot during high-k dielectric/metal gate etching |
Aug. 25, 2009 |
| 7534672 |
Tiered gate device with source and drain extensions |
May. 19, 2009 |
| 7521348 |
Method of fabricating semiconductor device having fine contact holes |
Apr. 21, 2009 |
| 7507674 |
Memory device including resistance change layer as storage node and method(s) for making the same |
Mar. 24, 2009 |
| 7482271 |
Manufacturing method for electronic substrate, manufacturing method for electro-optical device, and manufacturing method for electronic device |
Jan. 27, 2009 |
| 7476610 |
Removable spacer |
Jan. 13, 2009 |
| 7470606 |
Masking methods |
Dec. 30, 2008 |
| 7465674 |
Manufacturing method of semiconductor device |
Dec. 16, 2008 |
| 7465601 |
Method of forming suspended structure |
Dec. 16, 2008 |
| 7452825 |
Method of forming a mask structure and method of forming a minute pattern using the same |
Nov. 18, 2008 |
| 7432194 |
Etching method and method for forming contact opening |
Oct. 7, 2008 |
| 7419845 |
Methods of making electromechanical three-trace junction devices |
Sep. 2, 2008 |
| 7396781 |
Method and apparatus for adjusting feature size and position |
Jul. 8, 2008 |
| 7351666 |
Layout and process to contact sub-lithographic structures |
Apr. 1, 2008 |
| 7307306 |
Etch mask and method of forming a magnetic random access memory structure |
Dec. 11, 2007 |
| 7271098 |
Method of fabricating a desired pattern of electronically functional material |
Sep. 18, 2007 |
| 7265013 |
Sidewall image transfer (SIT) technologies |
Sep. 4, 2007 |
| 7241688 |
Aperture masks for circuit fabrication |
Jul. 10, 2007 |
| 7205244 |
Patterning substrates employing multi-film layers defining etch-differential interfaces |
Apr. 17, 2007 |
| 7163879 |
Hard mask etch for gate polyetch |
Jan. 16, 2007 |
| 7074480 |
Porous body and method of manufacturing the same |
Jul. 11, 2006 |
| 7071126 |
Densifying a relatively porous material |
Jul. 4, 2006 |
| 7064078 |
Techniques for the use of amorphous carbon (APF) for various etch and litho integration scheme |
Jun. 20, 2006 |
| 7052972 |
Method for forming sublithographic features during the manufacture of a semiconductor device and a resulting in-process apparatus |
May. 30, 2006 |
| 7049241 |
Method for forming a trench in a layer or a layer stack on a semiconductor wafer |
May. 23, 2006 |
| 7033936 |
Process for making island arrays |
Apr. 25, 2006 |
| 7030008 |
Techniques for patterning features in semiconductor devices |
Apr. 18, 2006 |
| 7029536 |
Processing system and method for treating a substrate |
Apr. 18, 2006 |
| 7026247 |
Nanocircuit and self-correcting etching method for fabricating same |
Apr. 11, 2006 |
| 7026253 |
Method for fabricating semiconductor device using ArF photolithography capable of protecting tapered profile of hard mask |
Apr. 11, 2006 |
| 7018931 |
Method of forming an isolation film in a semiconductor device |
Mar. 28, 2006 |
| 7015089 |
Method to improve etching of resist protective oxide (RPO) to prevent photo-resist peeling |
Mar. 21, 2006 |
| 7008808 |
Method of manufacturing LCOS spacers |
Mar. 7, 2006 |
| 7005240 |
Method for forming a hard mask in a layer on a planar device |
Feb. 28, 2006 |
| 7001692 |
Method of forming a mask having nitride film |
Feb. 21, 2006 |
| 6998332 |
Method of independent P and N gate length control of FET device made by sidewall image transfer technique |
Feb. 14, 2006 |
| 6998348 |
Method for manufacturing electronic circuits integrated on a semiconductor substrate |
Feb. 14, 2006 |
| 6987068 |
Methods to planarize semiconductor device and passivation layer |
Jan. 17, 2006 |
| 6972261 |
Method for fabricating fine features by jet-printing and surface treatment |
Dec. 6, 2005 |
| 6964929 |
Method of forming a narrow gate, and product produced thereby |
Nov. 15, 2005 |
| 6960510 |
Method of making sub-lithographic features |
Nov. 1, 2005 |
| 6946400 |
Patterning method for fabricating integrated circuit |
Sep. 20, 2005 |
| 6942732 |
Method for forming double density wordline |
Sep. 13, 2005 |
| 6943039 |
Method of etching ferroelectric layers |
Sep. 13, 2005 |
| 6936383 |
Method of defining the dimensions of circuit elements by using spacer deposition techniques |
Aug. 30, 2005 |
|
|
|