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Class Information
Number: 257/E21.036
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Making mask on semicond uctor body for further photolithographic processing (epo) > Comprising inorganic layer (epo) > Characterized by their size, orientation, disposition, behavior, shape, in horizontal or vertical plane (epo)
Description: This subclass is indented under subclass E21.033. This subclass is substantially the same in scope as ECLA classification H01L21/033F.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7425483 |
Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices |
Sep. 16, 2008 |
| 7381654 |
Method for fabricating right-angle holes in a substrate |
Jun. 3, 2008 |
| 7355200 |
Ion-sensitive field effect transistor and method for producing an ion-sensitive field effect transistor |
Apr. 8, 2008 |
| 7329588 |
Forming a reticle for extreme ultraviolet radiation and structures formed thereby |
Feb. 12, 2008 |
| 7304323 |
Test mask structure |
Dec. 4, 2007 |
| 7276793 |
Semiconductor device and semiconductor module |
Oct. 2, 2007 |
| 7276453 |
Methods for forming an undercut region and electronic devices incorporating the same |
Oct. 2, 2007 |
| 7220612 |
Liquid crystal display device and fabricating method thereof |
May. 22, 2007 |
| 7196005 |
Dual damascene process with dummy features |
Mar. 27, 2007 |
| 7060996 |
Mask, method of producing mask, and method of producing semiconductor device |
Jun. 13, 2006 |
| 7057300 |
Mask, method of producing mask, and method of producing semiconductor device |
Jun. 6, 2006 |
| 6952055 |
Intermediate structures in porous substrates in which electrical and optical microdevices are fabricated and intermediate structures formed by the same |
Oct. 4, 2005 |
| 6927155 |
Process for producing semiconductor layers based on III-V nitride semiconductors |
Aug. 9, 2005 |
| 6916597 |
Method for fabricating a resist pattern, a method for patterning a thin film and a method for manufacturing a micro device |
Jul. 12, 2005 |
| 6897009 |
Fabrication of nanometer size gaps on an electrode |
May. 24, 2005 |
| 6852640 |
Method for fabricating a hard mask |
Feb. 8, 2005 |
| 6849486 |
Method of manufacturing a thinned gate electrode utilizing protective films and etching |
Feb. 1, 2005 |
| 6712903 |
Mask for evaluating selective epitaxial growth process |
Mar. 30, 2004 |
| 6632741 |
Self-trimming method on looped patterns |
Oct. 14, 2003 |
| 6596466 |
Contact structure and method of forming a contact structure |
Jul. 22, 2003 |
| 6544905 |
Metal gate trim process by using self assembled monolayers |
Apr. 8, 2003 |
| 6458494 |
Etching method |
Oct. 1, 2002 |
| 6350623 |
Method of forming intermediate structures in porous substrates in which electrical and optical microdevices are fabricated and intermediate structures formed by the same |
Feb. 26, 2002 |
| 6270685 |
Method for producing a semiconductor |
Aug. 7, 2001 |
| 6235623 |
Methods of forming integrated circuit contact holes using blocking layer patterns |
May. 22, 2001 |
| 6184151 |
Method for forming cornered images on a substrate and photomask formed thereby |
Feb. 6, 2001 |
| 6168982 |
Manufacture of electronic devices comprising thin-film circuit elements |
Jan. 2, 2001 |
| 6140218 |
Method for fabricating a T-shaped hard mask/conductor profile to improve self-aligned contact isolation |
Oct. 31, 2000 |
| 6130010 |
Method for producing a semiconductor dynamic sensor using an anisotropic etching mask |
Oct. 10, 2000 |
| 6043164 |
Method for transferring a multi-level photoresist pattern |
Mar. 28, 2000 |
| 6027842 |
Process for controlling etching parameters |
Feb. 22, 2000 |
| 6013136 |
Apparatus for plasma-supported back etching of a semiconductor wafer |
Jan. 11, 2000 |
| 5976740 |
Process for controlling exposure dose or focus parameters using tone reversing pattern |
Nov. 2, 1999 |
| 5959325 |
Method for forming cornered images on a substrate and photomask formed thereby |
Sep. 28, 1999 |
| 5943571 |
Method for manufacturing fine structures |
Aug. 24, 1999 |
| 5846609 |
Masking methods for semiconductor materials |
Dec. 8, 1998 |
| 5811222 |
Method of selectively exposing a material using a photosensitive layer and multiple image patterns |
Sep. 22, 1998 |
| 5795830 |
Reducing pitch with continuously adjustable line and space dimensions |
Aug. 18, 1998 |
| 5766803 |
Mask generation technique for producing an integrated circuit with optimal metal interconnect layout for achieving global planarization |
Jun. 16, 1998 |
| 5730798 |
Masking methods during semiconductor device fabrication |
Mar. 24, 1998 |
| 5439847 |
Integrated circuit fabrication with a raised feature as mask |
Aug. 8, 1995 |
| 5298444 |
Method for manufacturing a field effect transistor |
Mar. 29, 1994 |
| 5278105 |
Semiconductor device with dummy features in active layers |
Jan. 11, 1994 |
| 4927772 |
Method of making high breakdown voltage semiconductor device |
May. 22, 1990 |
| 4830971 |
Method for manufacturing a semiconductor device utilizing self-aligned contact regions |
May. 16, 1989 |
| 4820656 |
Method for producing a p-doped semiconductor region in an n-conductive semiconductor body |
Apr. 11, 1989 |
| 4797371 |
Method for forming an impurity region in semiconductor devices by out-diffusion |
Jan. 10, 1989 |
| 4758528 |
Self-aligned metal process for integrated circuit metallization |
Jul. 19, 1988 |
| 4757031 |
Method for the manufacture of a pn-junction having high dielectric strength |
Jul. 12, 1988 |
| 4732869 |
Method of forming implanted regions in a semiconductor device by use of a three layer masking structure |
Mar. 22, 1988 |
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