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Class Information
Number: 257/E21.035
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Making mask on semicond uctor body for further photolithographic processing (epo) > Comprising inorganic layer (epo) > Characterized by their composition, e.g., multilayer masks, materials (epo)
Description: This subclass is indented under subclass E21.033. This subclass is substantially the same in scope as ECLA classification H01L21/033D.


Patents under this class:
1 2 3 4 5 6

Patent Number Title Of Patent Date Issued
7452825 Method of forming a mask structure and method of forming a minute pattern using the same Nov. 18, 2008
7439196 Method for manufacturing pattern formed structure Oct. 21, 2008
7381654 Method for fabricating right-angle holes in a substrate Jun. 3, 2008
7378738 Method for producing self-aligned mask, articles produced by same and composition for same May. 27, 2008
7368390 Photolithographic patterning process using a carbon hard mask layer of diamond-like hardness produced by a plasma-enhanced deposition process May. 6, 2008
7364925 Organic light emitting device having a protective barrier Apr. 29, 2008
7309659 Silicon-containing resist to pattern organic low k-dielectrics Dec. 18, 2007
7138338 Method and composite hard mask for forming deep trenches in a semiconductor substrate Nov. 21, 2006
7138341 Process for making a memory structure Nov. 21, 2006
7064078 Techniques for the use of amorphous carbon (APF) for various etch and litho integration scheme Jun. 20, 2006
7060635 Method of manufacturing semiconductor device and method of forming pattern Jun. 13, 2006
7056446 Method of manufacturing nano-gap electrode Jun. 6, 2006
7056830 Method for plasma etching a dielectric layer Jun. 6, 2006
7052621 Bilayered metal hardmasks for use in Dual Damascene etch schemes May. 30, 2006
7049052 Method providing an improved bi-layer photoresist pattern May. 23, 2006
7033936 Process for making island arrays Apr. 25, 2006
7033948 Method for reducing dimensions between patterns on a photoresist Apr. 25, 2006
7029753 Multi-layer hard mask structure for etching deep trench in substrate Apr. 18, 2006
7026253 Method for fabricating semiconductor device using ArF photolithography capable of protecting tapered profile of hard mask Apr. 11, 2006
7026247 Nanocircuit and self-correcting etching method for fabricating same Apr. 11, 2006
7014959 CD uniformity of chrome etch to photomask process Mar. 21, 2006
7014958 Method for dry etching photomask material Mar. 21, 2006
7001692 Method of forming a mask having nitride film Feb. 21, 2006
6998348 Method for manufacturing electronic circuits integrated on a semiconductor substrate Feb. 14, 2006
6984436 Graded material and method for synthesis thereof and method for processing thereof Jan. 10, 2006
6967146 Isolation region forming methods Nov. 22, 2005
6964929 Method of forming a narrow gate, and product produced thereby Nov. 15, 2005
6958295 Method for using a hard mask for critical dimension growth containment Oct. 25, 2005
6951820 Method for using a hard mask for critical dimension growth containment Oct. 4, 2005
6939808 Undoped and fluorinated amorphous carbon film as pattern mask for metal etch Sep. 6, 2005
6939794 Boron-doped amorphous carbon film for use as a hard etch mask during the formation of a semiconductor device Sep. 6, 2005
6936539 Antireflective coating for use during the manufacture of a semiconductor device Aug. 30, 2005
6913958 Method for patterning a feature using a trimmed hardmask Jul. 5, 2005
6902939 Integrated circuit and method Jun. 7, 2005
6903392 Semiconductor device and its manufacturing method Jun. 7, 2005
6900123 BARC etch comprising a selective etch chemistry and a high polymerizing gas for CD control May. 31, 2005
6897120 Method of forming integrated circuitry and method of forming shallow trench isolation in a semiconductor substrate May. 24, 2005
6893954 Method for patterning a semiconductor wafer May. 17, 2005
6884733 Use of amorphous carbon hard mask for gate patterning to eliminate requirement of poly re-oxidation Apr. 26, 2005
6878619 Method for fabricating semiconductor device Apr. 12, 2005
6878635 Dry etching Apr. 12, 2005
6875664 Formation of amorphous carbon ARC stack having graded transition between amorphous carbon and ARC material Apr. 5, 2005
6872666 Method for making a dual damascene interconnect using a dual hard mask Mar. 29, 2005
6864556 CVD organic polymer film for advanced gate patterning Mar. 8, 2005
6864188 Semiconductor configuration and process for etching a layer of the semiconductor configuration using a silicon-containing etching mask Mar. 8, 2005
6855627 Method of using amorphous carbon to prevent resist poisoning Feb. 15, 2005
6838300 Chemical treatment of low-k dielectric films Jan. 4, 2005
6835663 Hardmask of amorphous carbon-hydrogen (a-C:H) layers with tunable etch resistivity Dec. 28, 2004
6835670 Method of manufacturing semiconductor device Dec. 28, 2004
6831013 Method of forming a dual damascene via by using a metal hard mask layer Dec. 14, 2004

1 2 3 4 5 6


 
 
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