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Class Information
Number: 257/E21.032
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Making mask on semicond uctor body for further photolithographic processing (epo) > Comprising organic layer (epo) > Characterized by treatment of photoresist layer (epo) > Ion lithographic process (epo)
Description: This subclass is indented under subclass E21.026. This subclass is substantially the same in scope as ECLA classification H01L21/027B6E.


Patents under this class:

Patent Number Title Of Patent Date Issued
7115525 Method for integrated circuit fabrication using pitch multiplication Oct. 3, 2006
7067435 Method for etch-stop layer etching during damascene dielectric etching with low polymerization Jun. 27, 2006
7026099 Pattern forming method and method for manufacturing semiconductor device Apr. 11, 2006
6774043 Method of manufacturing semiconductor device Aug. 10, 2004
6194268 Printing sublithographic images using a shadow mandrel and off-axis exposure Feb. 27, 2001
6096598 Method for forming pillar memory cells and device formed thereby Aug. 1, 2000
5849436 Block mask and charged particle beam exposure method and apparatus using the same Dec. 15, 1998
5770336 Lithography mask and fabrication method thereof Jun. 23, 1998
5387529 Production method of a MESFET semiconductor device Feb. 7, 1995
5300445 Production method of an HEMT semiconductor device Apr. 5, 1994
5102688 Fine pattern forming process Apr. 7, 1992
5037767 Method of manufacturing a semiconductor device by ion implantation through an ion-sensitive resist Aug. 6, 1991
4851691 Method for photoresist pretreatment prior to charged particle beam processing Jul. 25, 1989
4383026 Accelerated particle lithographic processing and articles so produced May. 10, 1983



 
 
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