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Class Information
Number: 257/E21.03
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Making mask on semicond uctor body for further photolithographic processing (epo) > Comprising organic layer (epo) > Characterized by treatment of photoresist layer (epo) > Electro-lithographic process (epo)
Description: This subclass is indented under subclass E21.026. This subclass is substantially the same in scope as ECLA classification H01L21/027B6C.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8519523 Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices Aug. 27, 2013
8022412 Epitaxial structure having low defect density Sep. 20, 2011
7897522 Method and system for improving particle beam lithography Mar. 1, 2011
7825525 Layout and process to contact sub-lithographic structures Nov. 2, 2010
7595268 Semiconductor package having re-distribution lines for supplying power and a method for manufacturing the same Sep. 29, 2009
7485560 Method for fabricating crystalline silicon thin films Feb. 3, 2009
7296245 Combined e-beam and optical exposure semiconductor lithography Nov. 13, 2007
7202095 Method for measuring silicide proportion, method for measuring annealing temperature, method for fabricating semiconductor device and x-ray photo receiver Apr. 10, 2007
7026099 Pattern forming method and method for manufacturing semiconductor device Apr. 11, 2006
6989333 Process for forming a pattern Jan. 24, 2006
6972165 Electron beam exposure mask and electron beam exposure method using the same Dec. 6, 2005
6897157 Method of repairing an opaque defect on a mask with electron beam-induced chemical etching May. 24, 2005
6875624 Combined E-beam and optical exposure semiconductor lithography Apr. 5, 2005
6861376 Photoresist scum free process for via first dual damascene process Mar. 1, 2005
6855646 Plasma polymerized electron beam resist Feb. 15, 2005
6727179 Method for creating an integrated circuit stage wherein fine and large patterns coexist Apr. 27, 2004
6436810 Bi-layer resist process for dual damascene Aug. 20, 2002
6319566 Method of molecular-scale pattern imprinting at surfaces Nov. 20, 2001
6239008 Method of making a density multiplier for semiconductor device manufacturing May. 29, 2001
6174801 E-beam direct writing to pattern step profiles of dielectric layers applied to fill poly via with poly line, contact with metal line, and metal via with metal line Jan. 16, 2001
6156393 Method of molecular-scale pattern imprinting at surfaces Dec. 5, 2000
6153499 Method of manufacturing semiconductor device Nov. 28, 2000
6150070 Method of creating optimal profile in single layer photoresist Nov. 21, 2000
6127272 Method of electron beam lithography on very high resistivity substrates Oct. 3, 2000
5876901 Method for fabricating semiconductor device Mar. 2, 1999
5837423 Semiconductor IC device fabricating method Nov. 17, 1998
5776820 Method of forming a high-frequency transistor T gate electrode Jul. 7, 1998
5770336 Lithography mask and fabrication method thereof Jun. 23, 1998
5702620 Ultrafine pattern forming method and ultrafine etching method using calixarene derivative as negative resist Dec. 30, 1997
5693548 Method for making T-gate of field effect transistor Dec. 2, 1997
5641715 Semiconductor IC device fabricating method Jun. 24, 1997
5539222 High yield sub-micron gate FETs Jul. 23, 1996
5468595 Method for three-dimensional control of solubility properties of resist layers Nov. 21, 1995
5432119 High yield electron-beam gate fabrication method for sub-micron gate FETS Jul. 11, 1995
5350485 High-resolution lithography and semiconductor device manufacturing method Sep. 27, 1994
5166888 Fabrication of particle beam masks Nov. 24, 1992
5102688 Fine pattern forming process Apr. 7, 1992
5091047 Plasma etching using a bilayer mask Feb. 25, 1992
5045150 Plasma etching using a bilayer mask Sep. 3, 1991
4810617 Treatment of planarizing layer in multilayer electron beam resist Mar. 7, 1989
4748132 Micro fabrication process for semiconductor structure using coherent electron beams May. 31, 1988
4702993 Treatment of planarizing layer in multilayer electron beam resist Oct. 27, 1987
4642672 Semiconductor device having registration mark for electron beam exposure Feb. 10, 1987
4603473 Method of fabricating integrated semiconductor circuit Aug. 5, 1986
4595649 Glassy TiO.sub.2 polymer films as electron beam charge dissipation layers Jun. 17, 1986
4578343 Method for producing field effect type semiconductor device Mar. 25, 1986
4557995 Method of making submicron circuit structures Dec. 10, 1985
4489241 Exposure method with electron beam exposure apparatus Dec. 18, 1984
4487795 Method of forming patterned conductor lines Dec. 11, 1984
4458129 Discharge device and method for use in processing semiconductor devices Jul. 3, 1984

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