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Class Information
Number: 257/E21.027
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of semiconductor device (epo) > Making mask on semicond uctor body for further photolithographic processing (epo) > Comprising organic layer (epo) > Characterized by treatment of photoresist layer (epo) > Photolith ographic process (epo)
Description: This subclass is indented under subclass E21.026. This subclass is substantially the same in scope as ECLA classification H01L21/027B6B.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7439196 |
Method for manufacturing pattern formed structure |
Oct. 21, 2008 |
| 7413922 |
Fabricating method of a pixel structure |
Aug. 19, 2008 |
| 7381654 |
Method for fabricating right-angle holes in a substrate |
Jun. 3, 2008 |
| 7368362 |
Methods for increasing photo alignment margins |
May. 6, 2008 |
| 7368390 |
Photolithographic patterning process using a carbon hard mask layer of diamond-like hardness produced by a plasma-enhanced deposition process |
May. 6, 2008 |
| 7335593 |
Method of fabricating semiconductor device |
Feb. 26, 2008 |
| 7262129 |
Minimizing resist poisoning in the manufacture of semiconductor devices |
Aug. 28, 2007 |
| 7259106 |
Method of making a microelectronic and/or optoelectronic circuitry sheet |
Aug. 21, 2007 |
| 7169716 |
Photosensitive lacquer for providing a coating on a semiconductor substrate or a mask |
Jan. 30, 2007 |
| 7145247 |
Offset-bonded, multi-chip semiconductor device |
Dec. 5, 2006 |
| 7064075 |
Method for manufacturing semiconductor electronics devices |
Jun. 20, 2006 |
| 7049241 |
Method for forming a trench in a layer or a layer stack on a semiconductor wafer |
May. 23, 2006 |
| 7041568 |
Method for the production of a self-adjusted structure on a semiconductor wafer |
May. 9, 2006 |
| 7033948 |
Method for reducing dimensions between patterns on a photoresist |
Apr. 25, 2006 |
| 7026240 |
Method of fabricating a semiconductor device having a photo-sensitive polyimide layer and a device fabricated in accordance with the method |
Apr. 11, 2006 |
| 7026106 |
Exposure method for the contact hole |
Apr. 11, 2006 |
| 7018780 |
Methods for controlling and reducing profile variation in photoresist trimming |
Mar. 28, 2006 |
| 7018748 |
Process for producing hard masks |
Mar. 28, 2006 |
| 7015529 |
Localized masking for semiconductor structure development |
Mar. 21, 2006 |
| 6989231 |
Method of forming fine patterns using silicon oxide layer |
Jan. 24, 2006 |
| 6979654 |
Method of avoiding dielectric layer deterioation with a low dielectric constant during a stripping process |
Dec. 27, 2005 |
| 6962878 |
Method to reduce photoresist mask line dimensions |
Nov. 8, 2005 |
| 6958292 |
Method of manufacturing integrated circuit |
Oct. 25, 2005 |
| 6936406 |
Method of manufacturing integrated circuit |
Aug. 30, 2005 |
| 6936408 |
Partially photoexposed positive photoresist layer blocking method for regio-selectively processing a microelectronic layer |
Aug. 30, 2005 |
| 6933191 |
Two-mask process for metal-insulator-metal capacitors and single mask process for thin film resistors |
Aug. 23, 2005 |
| 6911399 |
Method of controlling critical dimension microloading of photoresist trimming process by selective sidewall polymer deposition |
Jun. 28, 2005 |
| 6905621 |
Method for preventing the etch transfer of sidelobes in contact hole patterns |
Jun. 14, 2005 |
| 6905899 |
Methods for forming a photoresist pattern using an anti-optical proximity effect |
Jun. 14, 2005 |
| 6902868 |
Method of manufacturing integrated circuit |
Jun. 7, 2005 |
| 6900138 |
Oxygen plasma treatment for nitride surface to reduce photo footing |
May. 31, 2005 |
| 6893972 |
Process for sidewall amplification of resist structures and for the production of structures having reduced structure size |
May. 17, 2005 |
| 6890699 |
Polymer material having a low glass transition temperature for use in chemically amplified photoresists for semiconductor production |
May. 10, 2005 |
| 6884735 |
Materials and methods for sublithographic patterning of gate structures in integrated circuit devices |
Apr. 26, 2005 |
| 6875624 |
Combined E-beam and optical exposure semiconductor lithography |
Apr. 5, 2005 |
| 6872663 |
Method for reworking a multi-layer photoresist following an underlayer development |
Mar. 29, 2005 |
| 6869737 |
Method for exposing a photosensitive resist layer with near-field light |
Mar. 22, 2005 |
| 6866986 |
Method of 193 NM photoresist stabilization by the use of ion implantation |
Mar. 15, 2005 |
| 6861376 |
Photoresist scum free process for via first dual damascene process |
Mar. 1, 2005 |
| 6821913 |
Method for forming dual oxide layers at bottom of trench |
Nov. 23, 2004 |
| 6815333 |
Tri-layer masking architecture for patterning dual damascene interconnects |
Nov. 9, 2004 |
| 6800551 |
Chemical amplification type photoresist composition, method for producing a semiconductor device using the composition, and semiconductor substrate |
Oct. 5, 2004 |
| 6799907 |
Plasma enhanced method for increasing silicon-containing photoresist selectivity |
Oct. 5, 2004 |
| 6794113 |
Negative resist composition, method for the formation of resist patterns and process for the production of electronic devices |
Sep. 21, 2004 |
| 6794207 |
Method of manufacturing integrated circuit |
Sep. 21, 2004 |
| 6794112 |
Negative resist composition, method for the formation of resist patterns and process for the production of electronic devices |
Sep. 21, 2004 |
| 6787288 |
Negative resist composition, method for the formation of resist patterns and process for the production of electronic devices |
Sep. 7, 2004 |
| 6787455 |
Bi-layer photoresist method for forming high resolution semiconductor features |
Sep. 7, 2004 |
| 6787484 |
Method of reducing visible light induced arcing in a semiconductor wafer manufacturing process |
Sep. 7, 2004 |
| 6784005 |
Photoresist reflow for enhanced process window for random, isolated, semi-dense, and other non-dense contacts |
Aug. 31, 2004 |
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