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Class Information
Number: 257/929
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Pn junction isolated integrated circuit with isolation walls having minimum dopant concentration at intermediate depth in epitaxial layer (e.g., diffused from both surfaces of epitaxial layer)
Description: Subject matter comprising an integrated circuit with pn junction isolation and having boundary walls isolating the integrated circuit from its substrate, wherein the walls have a minimum concentration of dopant at an intermediate depth in an epitaxial layer substrate (e.g., diffused from both surfaces of an epitaxial layer).










Patents under this class:

Patent Number Title Of Patent Date Issued
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8039359 Method of forming low capacitance ESD device and structure therefor Oct. 18, 2011
7538395 Method of forming low capacitance ESD device and structure therefor May. 26, 2009
7474011 Method for improved single event latch up resistance in an integrated circuit Jan. 6, 2009
6867438 Solid-state imaging device and manufacturing method thereof Mar. 15, 2005
6838715 CMOS image sensor arrangement with reduced pixel light shadowing Jan. 4, 2005
6809003 Bi-directional epitaxial doping technique Oct. 26, 2004
6787829 LCD panel Sep. 7, 2004
6781162 Light emitting device and method of manufacturing the same Aug. 24, 2004
6756617 Image sensing apparatus and reading apparatus Jun. 29, 2004
6611007 Method for locally modifying the effective bandgap energy in indium gallium arsenide phosphide (InGaAsP) quantum well structures Aug. 26, 2003
6608352 Determination of thermal resistance for field effect transistor formed in SOI technology Aug. 19, 2003
5719425 Multiple implant lightly doped drain (MILDD) field effect transistor Feb. 17, 1998
5701022 Semiconductor memory device with trench capacitor Dec. 23, 1997
5623159 Integrated circuit isolation structure for suppressing high-frequency cross-talk Apr. 22, 1997
5478761 Method of producing semiconductor device having first and second type field effect transistors Dec. 26, 1995
5408125 Semiconductor process for manufacturing semiconductor device with increased operating voltages Apr. 18, 1995
4962322 Nonvolatible capacitor random access memory Oct. 9, 1990
4961095 Semiconductor memory device with word lines adjacent and non-intersecting with capacitor grooves Oct. 2, 1990
4926224 Crosspoint dynamic ram cell for folded bitline array May. 15, 1990
4833518 Semiconductor memory device having improved interconnection structure of memory cell array May. 23, 1989
4825268 Semiconductor memory device Apr. 25, 1989
4131906 Dynamic random access memory using MOS FETs and method for manufacturing same Dec. 26, 1978











 
 
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