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Class Information
Number: 257/923
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > With means to optimize electrical conductor current carrying capacity (e.g., particular conductor aspect ratio)
Description: Subject matter in which an active solid-state device includes means to optimize the current carrying capacity of an electrical conductor of the device, e.g., by using a particular conductor cross-sectional configuration.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7202567 |
Semiconductor device and manufacturing method for the same |
Apr. 10, 2007 |
| 7145234 |
Circuit carrier and package structure thereof |
Dec. 5, 2006 |
| 6987040 |
Trench MOSFET with increased channel density |
Jan. 17, 2006 |
| 6818946 |
Trench MOSFET with increased channel density |
Nov. 16, 2004 |
| 6777771 |
High-frequency device using switch having movable parts, and method of manufacture thereof |
Aug. 17, 2004 |
| 6617692 |
Apparatus for implementing selected functionality on an integrated circuit device |
Sep. 9, 2003 |
| 6586828 |
Integrated circuit bus grid having wires with pre-selected variable widths |
Jul. 1, 2003 |
| 6380577 |
Tantalum chip capacitor |
Apr. 30, 2002 |
| 6229163 |
Very high aspect ratio semiconductor devices using fractal based topologies |
May. 8, 2001 |
| 6146936 |
Integrated circuitry, methods of reducing alpha particle inflicted damage to SRAM cells, methods of forming integrated circuitry, and methods of forming SRAM cells |
Nov. 14, 2000 |
| 5923089 |
Efficient routing method and resulting structure for integrated circuits |
Jul. 13, 1999 |
| 5917197 |
Integrated multi-layer test pads |
Jun. 29, 1999 |
| 5864180 |
Semiconductor device and method for manufacturing the same |
Jan. 26, 1999 |
| 5854515 |
Integrated circuit having conductors of enhanced cross-sectional area |
Dec. 29, 1998 |
| 5818110 |
Integrated circuit chip wiring structure with crossover capability and method of manufacturing the same |
Oct. 6, 1998 |
| 5808366 |
Integrated circuits, and methods of fabricating same, which take into account capacitive loading by the integrated circuit potting material |
Sep. 15, 1998 |
| 5793098 |
Package including conductive layers having notches formed |
Aug. 11, 1998 |
| 5731606 |
Reliable edge cell array design |
Mar. 24, 1998 |
| 5648685 |
Active matrix assembly with lines of equal resistance |
Jul. 15, 1997 |
| 5594281 |
Semiconductor apparatus having wiring structure of an integrated circuit in which a plurality of logic circuits of the same structure are arranged in the same direction |
Jan. 14, 1997 |
| 5583788 |
Automatic layout design method of wirings in integrated circuit using hierarchical algorithm |
Dec. 10, 1996 |
| 5532501 |
Semiconductor device having wiring take-out cells |
Jul. 2, 1996 |
| 5532509 |
Semiconductor inverter layout having improved electromigration characteristics in the output node |
Jul. 2, 1996 |
| 5414296 |
Venetian blind cell layout for RF power transistor |
May. 9, 1995 |
| 5329156 |
Feed bus for RF power transistors |
Jul. 12, 1994 |
| 5317184 |
Device and method for improving current carrying capability in a semiconductor device |
May. 31, 1994 |
| 5285110 |
Interconnection structure in semiconductor device |
Feb. 8, 1994 |
| 5248347 |
Solar cell |
Sep. 28, 1993 |
| 5185651 |
Integrated circuit with current detection |
Feb. 9, 1993 |
| 5151772 |
Semiconductor integrated circuit device |
Sep. 29, 1992 |
| 5140402 |
Automatic placement method for arranging logic cells |
Aug. 18, 1992 |
| 5119314 |
Semiconductor integrated circuit device |
Jun. 2, 1992 |
| 4969029 |
Cellular integrated circuit and hierarchial method |
Nov. 6, 1990 |
| 4947229 |
Semiconductor integrated circuit |
Aug. 7, 1990 |
| 4933576 |
Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit |
Jun. 12, 1990 |
| 4910574 |
Porous circuit macro for semiconductor integrated circuits |
Mar. 20, 1990 |
| 4904886 |
Gate array with high driving ability cells |
Feb. 27, 1990 |
| 4858175 |
Monolithic semi-custom IC having standard LSI sections and coupling gate array sections |
Aug. 15, 1989 |
| 4855958 |
Semiconductor integrated circuit device having logic macro and random access memory macro |
Aug. 8, 1989 |
| 4851717 |
Master slice integrated circuit capable of high speed operation |
Jul. 25, 1989 |
| 4851891 |
Gate array having transistor buried in interconnection region |
Jul. 25, 1989 |
| 4849932 |
Master slice integrated circuit having a memory region |
Jul. 18, 1989 |
| 4839710 |
CMOS cell which can be used as a resistor, a capacitor, an RC component or a terminating impedance of a signal |
Jun. 13, 1989 |
| 4839820 |
Monolithic semi-custom LSI |
Jun. 13, 1989 |
| 4833620 |
Method for fabricating a 1-chip microcomputer |
May. 23, 1989 |
| 4833520 |
Semiconductor integrated circuit having wirings for power supply suited for computer-aided-design |
May. 23, 1989 |
| 4814639 |
Super integration circuit device having a plurality of IC-chip equivalent regions formed on a single semiconductor substrate |
Mar. 21, 1989 |
| 4808947 |
Integrated active filter without external components |
Feb. 28, 1989 |
| 4775942 |
Seed and stitch approach to embedded arrays |
Oct. 4, 1988 |
| 4766476 |
C-MOS technology base cell |
Aug. 23, 1988 |
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