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Class Information
Number: 257/903
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Fet configuration adapted for use as static memory cell
Description: Subject matter wherein a field effect transistor is structurally arranged to be used in a static memory element (i.e., one in which information need not be periodically refreshed).
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| RE40579 |
Structure for transistor devices in an SRAM cell |
Nov. 25, 2008 |
| 7453126 |
Semiconductor memory device having layout area reduced |
Nov. 18, 2008 |
| 7436078 |
Line layout structure of semiconductor memory device |
Oct. 14, 2008 |
| 7432562 |
SRAM devices, and electronic systems comprising SRAM devices |
Oct. 7, 2008 |
| 7425744 |
Fabricating logic and memory elements using multiple gate layers |
Sep. 16, 2008 |
| 7411256 |
Semiconductor integrated circuit device capacitive node interconnect |
Aug. 12, 2008 |
| 7405447 |
Silicon rich barrier layers for integrated circuit devices |
Jul. 29, 2008 |
| 7397693 |
Semiconductor memory device with memory cells operated by boosted voltage |
Jul. 8, 2008 |
| 7397691 |
Static random access memory cell with improved stability |
Jul. 8, 2008 |
| 7388267 |
Selective stress engineering for SRAM stability improvement |
Jun. 17, 2008 |
| 7382026 |
Semiconductor memory device and method of manufacturing the same |
Jun. 3, 2008 |
| 7361960 |
Semiconductor device and method of manufacturing the same |
Apr. 22, 2008 |
| 7361961 |
Method and apparatus with varying gate oxide thickness |
Apr. 22, 2008 |
| 7358575 |
Method of fabricating SRAM device |
Apr. 15, 2008 |
| 7358556 |
SRAM cell structure and manufacturing method thereof |
Apr. 15, 2008 |
| 7355880 |
Soft error resistant memory cell and method of manufacture |
Apr. 8, 2008 |
| 7348640 |
Memory device |
Mar. 25, 2008 |
| 7348658 |
Multilayer silicon over insulator device |
Mar. 25, 2008 |
| 7332780 |
Inverter, semiconductor logic circuit, static random access memory and data latch circuit |
Feb. 19, 2008 |
| 7333380 |
SRAM memory device with flash clear and corresponding flash clear method |
Feb. 19, 2008 |
| 7309890 |
SRAM cell structure and manufacturing method thereof |
Dec. 18, 2007 |
| 7304352 |
Alignment insensitive D-cache cell |
Dec. 4, 2007 |
| 7294889 |
Semiconductor device having a well structure for improving soft error rate immunity and latch-up immunity and a method of making such a device |
Nov. 13, 2007 |
| 7291889 |
Basic cells configurable into different types of semiconductor integrated circuits |
Nov. 6, 2007 |
| 7285832 |
Multiport single transistor bit cell |
Oct. 23, 2007 |
| 7286389 |
Low-power, p-channel enhancement-type metal-oxide semiconductor field-effect transistor (PMOSFET) SRAM cells |
Oct. 23, 2007 |
| 7279755 |
SRAM cell with improved layout designs |
Oct. 9, 2007 |
| 7271454 |
Semiconductor memory device and method of manufacturing the same |
Sep. 18, 2007 |
| 7271451 |
Memory cell structure |
Sep. 18, 2007 |
| 7269056 |
Power grid design for split-word line style memory cell |
Sep. 11, 2007 |
| 7269057 |
Method for connecting circuit elements within an integrated circuit for reducing single-event upsets |
Sep. 11, 2007 |
| 7250657 |
Layout structure for memory arrays with SOI devices |
Jul. 31, 2007 |
| 7250661 |
Semiconductor memory device with plural source/drain regions |
Jul. 31, 2007 |
| 7244977 |
Longitudinal MISFET manufacturing method, longitudinal MISFET, semiconductor storage device manufacturing method, and semiconductor storage device |
Jul. 17, 2007 |
| 7238990 |
Interlayer dielectric under stress for an integrated circuit |
Jul. 3, 2007 |
| 7233032 |
SRAM device having high aspect ratio cell boundary |
Jun. 19, 2007 |
| 7230842 |
Memory cell having p-type pass device |
Jun. 12, 2007 |
| 7227175 |
Semiconductor device with different lattice properties |
Jun. 5, 2007 |
| 7221031 |
Semiconductor device having sufficient process margin and method of forming same |
May. 22, 2007 |
| 7214963 |
3-D column select circuit layout in semiconductor memory devices |
May. 8, 2007 |
| 7208794 |
High-density NROM-FINFET |
Apr. 24, 2007 |
| 7208369 |
Dual poly layer and method of manufacture |
Apr. 24, 2007 |
| 7198990 |
Method for making a FET channel |
Apr. 3, 2007 |
| 7199428 |
Master chip, semiconductor memory, and method for manufacturing semiconductor memory |
Apr. 3, 2007 |
| 7199433 |
Method of manufacturing semiconductor integrated circuit device having capacitor element |
Apr. 3, 2007 |
| 7196923 |
Bitcell layout |
Mar. 27, 2007 |
| 7193278 |
Static random access memories (SRAMS) having vertical transistors |
Mar. 20, 2007 |
| 7190609 |
Semiconductor memory device with memory cells operated by boosted voltage |
Mar. 13, 2007 |
| 7170103 |
Wafer with vertical diode structures |
Jan. 30, 2007 |
| 7166896 |
Cross diffusion barrier layer in polysilicon |
Jan. 23, 2007 |
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