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Class Information
Number: 257/786
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Configuration or pattern of bonds
Description: Subject matter wherein the electrical contact, lead or bond, has a specific configuration or pattern.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7459796 |
BGA-type multilayer circuit wiring board |
Dec. 2, 2008 |
| 7459789 |
Bonding method of flexible film and display bonded thereby |
Dec. 2, 2008 |
| 7459776 |
Stacked die assembly having semiconductor die projecting beyond support |
Dec. 2, 2008 |
| 7455915 |
Selective application of conductive material to substrates by pick and place of compliant contact arrays |
Nov. 25, 2008 |
| 7453159 |
Semiconductor chip having bond pads |
Nov. 18, 2008 |
| 7453158 |
Pad over active circuit system and method with meshed support structure |
Nov. 18, 2008 |
| 7453157 |
Microelectronic packages and methods therefor |
Nov. 18, 2008 |
| 7453156 |
Wire bond interconnection |
Nov. 18, 2008 |
| 7449788 |
Chip structure with arrangement of side pads |
Nov. 11, 2008 |
| 7449787 |
Liquid crystal display |
Nov. 11, 2008 |
| 7449710 |
Vacuum jacket for phase change memory element |
Nov. 11, 2008 |
| 7446421 |
Bonding structure with buffer layer and method of forming the same |
Nov. 4, 2008 |
| 7446418 |
Semiconductor device for preventing defective filling of interconnection and cracking of insulating film |
Nov. 4, 2008 |
| 7446307 |
Sensor semiconductor device and fabrication method of the sensor semiconductor device |
Nov. 4, 2008 |
| 7443018 |
Integrated circuit package system including ribbon bond interconnect |
Oct. 28, 2008 |
| 7439622 |
Semiconductor device |
Oct. 21, 2008 |
| 7436077 |
Semiconductor device and method of manufacturing the same |
Oct. 14, 2008 |
| 7436072 |
Protected chip stack |
Oct. 14, 2008 |
| 7429799 |
Land patterns for a semiconductor stacking structure and method therefor |
Sep. 30, 2008 |
| 7429797 |
Electronic device and carrier substrate |
Sep. 30, 2008 |
| 7427812 |
Semiconductor device with increased number of external connection electrodes |
Sep. 23, 2008 |
| 7425767 |
Chip structure with redistribution traces |
Sep. 16, 2008 |
| 7425758 |
Metal core foldover package structures |
Sep. 16, 2008 |
| 7420286 |
Reduced inductance in ball grid array packages |
Sep. 2, 2008 |
| 7420206 |
Interposer, semiconductor chip mounted sub-board, and semiconductor package |
Sep. 2, 2008 |
| 7417329 |
System-in-package structure |
Aug. 26, 2008 |
| 7417328 |
External power ring with multiple tapings to reduce IR drop in integrated circuit |
Aug. 26, 2008 |
| 7417324 |
Semiconductor device and method for manufacturing the same |
Aug. 26, 2008 |
| 7414323 |
Tab tape and method of manufacturing the same |
Aug. 19, 2008 |
| 7414322 |
High speed interface design |
Aug. 19, 2008 |
| 7414321 |
Wiring configuration for semiconductor component |
Aug. 19, 2008 |
| 7414317 |
BGA package with concave shaped bonding pads |
Aug. 19, 2008 |
| 7414312 |
Memory-module board layout for use with memory chips of different data widths |
Aug. 19, 2008 |
| 7411295 |
Circuit board, device mounting structure, device mounting method, and electronic apparatus |
Aug. 12, 2008 |
| 7411287 |
Staggered wirebonding configuration |
Aug. 12, 2008 |
| 7411135 |
Contour structures to highlight inspection regions |
Aug. 12, 2008 |
| 7408241 |
Semiconductor device with a recessed bond pad |
Aug. 5, 2008 |
| 7403361 |
Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit |
Jul. 22, 2008 |
| 7400032 |
Module assembly for stacked BGA packages |
Jul. 15, 2008 |
| 7399990 |
Wafer-level package having test terminal |
Jul. 15, 2008 |
| 7399694 |
Semiconductor device and a manufacturing method of the same |
Jul. 15, 2008 |
| 7397138 |
Semiconductor device |
Jul. 8, 2008 |
| 7397129 |
Interposers with flexible solder pad elements |
Jul. 8, 2008 |
| 7397127 |
Bonding and probing pad structures |
Jul. 8, 2008 |
| 7394164 |
Semiconductor device having bumps in a same row for staggered probing |
Jul. 1, 2008 |
| 7394161 |
Chip structure with pads having bumps or wirebonded wires formed thereover or used to be tested thereto |
Jul. 1, 2008 |
| 7394159 |
Delamination reduction between vias and conductive pads |
Jul. 1, 2008 |
| 7391122 |
Techniques for flip chip package migration |
Jun. 24, 2008 |
| 7391114 |
Electrode pad section for external connection |
Jun. 24, 2008 |
| 7391110 |
Apparatus for providing capacitive decoupling between on-die power and ground conductors |
Jun. 24, 2008 |
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