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Class Information
Number: 257/780
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Ball or nail head type contact, lead, or bond
Description: Subject matter wherein a contact, lead, or bond is in the form of a wire having an end for connection to the semiconductor which is in the shape of a ball or nail head.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7459796 |
BGA-type multilayer circuit wiring board |
Dec. 2, 2008 |
| 7456502 |
Wiring board with connection electrode formed in opening and semiconductor device using the same |
Nov. 25, 2008 |
| 7453155 |
Method for fabricating a flip chip package |
Nov. 18, 2008 |
| 7449785 |
Solder bump on a semiconductor substrate |
Nov. 11, 2008 |
| 7449364 |
Device and method for including passive components in a chip scale package |
Nov. 11, 2008 |
| 7446405 |
Wafer level chip scale package (WLCSP) with high reliability against thermal stress |
Nov. 4, 2008 |
| 7446384 |
CMOS image sensor module with wafers |
Nov. 4, 2008 |
| 7446028 |
Multi-component integrated circuit contacts |
Nov. 4, 2008 |
| 7443041 |
Packaging of a microchip device |
Oct. 28, 2008 |
| 7443040 |
Aluminum cap with electroless nickel/immersion gold |
Oct. 28, 2008 |
| 7443036 |
Manufacturing method of semiconductor device |
Oct. 28, 2008 |
| 7436074 |
Chip package without core and stacked chip package structure thereof |
Oct. 14, 2008 |
| 7436073 |
Junction structure for a terminal pad and solder, and semiconductor device having the same |
Oct. 14, 2008 |
| 7436063 |
Packaging substrate and semiconductor device |
Oct. 14, 2008 |
| 7435619 |
Method of fabricating a 3-D package stacking system |
Oct. 14, 2008 |
| 7432604 |
Semiconductor component and system having thinned, encapsulated dice |
Oct. 7, 2008 |
| 7432555 |
Testable electrostatic discharge protection circuits |
Oct. 7, 2008 |
| 7429797 |
Electronic device and carrier substrate |
Sep. 30, 2008 |
| 7429704 |
Electronic component, electro-optical device, and electronic apparatus |
Sep. 30, 2008 |
| 7420285 |
Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument |
Sep. 2, 2008 |
| 7420284 |
Semiconductor device and manufacturing method thereof |
Sep. 2, 2008 |
| 7420283 |
Integration type semiconductor device and method for manufacturing the same |
Sep. 2, 2008 |
| 7420280 |
Reduced stress under bump metallization structure |
Sep. 2, 2008 |
| 7417326 |
Semiconductor device and manufacturing method of the same |
Aug. 26, 2008 |
| 7417325 |
Semiconductor component having thinned die with conductive vias configured as conductive pin terminal contacts |
Aug. 26, 2008 |
| 7417324 |
Semiconductor device and method for manufacturing the same |
Aug. 26, 2008 |
| 7414301 |
Printed circuit board with soldering lands |
Aug. 19, 2008 |
| 7408260 |
Microelectronic assemblies having compliant layers |
Aug. 5, 2008 |
| 7407877 |
Self-coplanarity bumping shape for flip-chip |
Aug. 5, 2008 |
| 7407833 |
Process for fabricating chip package structure |
Aug. 5, 2008 |
| 7405486 |
Circuit device |
Jul. 29, 2008 |
| 7405484 |
Semiconductor device containing stacked semiconductor chips and manufacturing method thereof |
Jul. 29, 2008 |
| 7397129 |
Interposers with flexible solder pad elements |
Jul. 8, 2008 |
| 7397127 |
Bonding and probing pad structures |
Jul. 8, 2008 |
| 7397121 |
Semiconductor chip with post-passivation scheme formed over passivation layer |
Jul. 8, 2008 |
| 7397117 |
Chip package with die and substrate |
Jul. 8, 2008 |
| 7394164 |
Semiconductor device having bumps in a same row for staggered probing |
Jul. 1, 2008 |
| 7394161 |
Chip structure with pads having bumps or wirebonded wires formed thereover or used to be tested thereto |
Jul. 1, 2008 |
| 7394160 |
Printed wires arrangement for in-line memory (IMM) module |
Jul. 1, 2008 |
| 7394148 |
Module having stacked chip scale semiconductor packages |
Jul. 1, 2008 |
| 7393719 |
Increased stand-off height integrated circuit assemblies, systems, and methods |
Jul. 1, 2008 |
| 7391114 |
Electrode pad section for external connection |
Jun. 24, 2008 |
| 7391107 |
Signal routing on redistribution layer |
Jun. 24, 2008 |
| 7387910 |
Method of bonding solder pads of flip-chip package |
Jun. 17, 2008 |
| 7385289 |
Semiconductor device using inorganic film between wiring layer and bonding pad |
Jun. 10, 2008 |
| 7382060 |
Semiconductor component having thinned die, polymer layers, contacts on opposing sides, and conductive vias connecting the contacts |
Jun. 3, 2008 |
| 7382005 |
Circuit component with bump formed over chip |
Jun. 3, 2008 |
| 7378746 |
Composite bump |
May. 27, 2008 |
| 7378734 |
Stacked contact bump |
May. 27, 2008 |
| 7375426 |
Semiconductor package |
May. 20, 2008 |
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