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Class Information
Number: 257/774
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration > Via (interconnection hole) shape
Description: Subject matter wherein the shape or configuration of an electrical contact or lead is determined by the shape of a hole through an insulating layer through which the contact extends.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7498660 |
Semiconductor device |
Mar. 3, 2009 |
| 7495340 |
Metal layer structure of semiconductor device |
Feb. 24, 2009 |
| 7495335 |
Method of reducing process steps in metal line protective structure formation |
Feb. 24, 2009 |
| 7495332 |
Multilayer printed wiring board |
Feb. 24, 2009 |
| 7495331 |
Semiconductor device, manufacturing method for semiconductor device, electronic component, circuit substrate, and electronic apparatus |
Feb. 24, 2009 |
| 7495327 |
Chip stacking structure |
Feb. 24, 2009 |
| 7495322 |
Light-emitting device |
Feb. 24, 2009 |
| 7495316 |
Methods of forming conductive vias and methods of forming multichip modules including such conductive vias |
Feb. 24, 2009 |
| 7492047 |
Semiconductor device and its manufacture method |
Feb. 17, 2009 |
| 7492020 |
Micro structure with interlock configuration |
Feb. 17, 2009 |
| 7491895 |
Wiring substrate and method of fabricating the same |
Feb. 17, 2009 |
| 7489040 |
Interconnection structure of semiconductor device |
Feb. 10, 2009 |
| 7485967 |
Semiconductor device with via hole for electric connection |
Feb. 3, 2009 |
| 7485966 |
Via connection structure with a compensative area on the reference plane |
Feb. 3, 2009 |
| 7485959 |
Structure for joining a semiconductor package to a substrate using a solder column |
Feb. 3, 2009 |
| 7482694 |
Semiconductor device and its manufacturing method |
Jan. 27, 2009 |
| 7482692 |
Tungsten plug structure of semiconductor device and method for forming the same |
Jan. 27, 2009 |
| 7482684 |
Semiconductor device with a dopant region in a lower wire |
Jan. 27, 2009 |
| 7482264 |
Method of forming metal line of semiconductor device, and semiconductor device |
Jan. 27, 2009 |
| 7482259 |
Chip structure and process for forming the same |
Jan. 27, 2009 |
| 7480426 |
Method of forming a three-dimensional stacked optical device |
Jan. 20, 2009 |
| 7479702 |
Composite conductive film and semiconductor package using such film |
Jan. 20, 2009 |
| 7479701 |
Dummy metal fill shapes for improved reliability of hybrid oxide/low-k dielectrics |
Jan. 20, 2009 |
| 7479671 |
Thin film phase change memory cell formed on silicon-on-insulator substrate |
Jan. 20, 2009 |
| 7476974 |
Method to fabricate interconnect structures |
Jan. 13, 2009 |
| 7476971 |
Via line barrier and etch stop structure |
Jan. 13, 2009 |
| 7476963 |
Three-dimensional stack manufacture for integrated circuit devices and method of manufacture |
Jan. 13, 2009 |
| 7476584 |
Method of fabricating a semiconductor device with a bit line contact plug |
Jan. 13, 2009 |
| 7473984 |
Method for fabricating a metal-insulator-metal capacitor |
Jan. 6, 2009 |
| 7470994 |
Bonding pad structure and method for making the same |
Dec. 30, 2008 |
| 7470981 |
Semiconductor device with varying dummy via-hole plug density |
Dec. 30, 2008 |
| 7470971 |
Anodically bonded ultra-high-vacuum cell |
Dec. 30, 2008 |
| 7468558 |
Devices having compliant wafer-level input/output interconnections and packages using pillars and methods of fabrication thereof |
Dec. 23, 2008 |
| 7466028 |
Semiconductor contact structure |
Dec. 16, 2008 |
| 7466027 |
Interconnect structures with surfaces roughness improving liner and methods for fabricating the same |
Dec. 16, 2008 |
| 7466026 |
Passivation layer assembly on a substrate and display substrate having the same |
Dec. 16, 2008 |
| 7466015 |
Supporting frame for surface-mount diode package |
Dec. 16, 2008 |
| 7465676 |
Method for forming dielectric film to improve adhesion of low-k film |
Dec. 16, 2008 |
| 7465651 |
Integrated circuit packages with reduced stress on die and associated methods |
Dec. 16, 2008 |
| 7464352 |
Methods for designing, evaluating and manufacturing semiconductor devices |
Dec. 9, 2008 |
| 7462938 |
Post passivation interconnection schemes on top of IC chip |
Dec. 9, 2008 |
| 7462937 |
Semiconductor device |
Dec. 9, 2008 |
| 7462931 |
Indented structure for encapsulated devices and method of manufacture |
Dec. 9, 2008 |
| 7462858 |
Fabrication of phase change memory element with phase-change electrodes using conformal deposition |
Dec. 9, 2008 |
| 7459793 |
Methods for forming contact hole, for manufacturing circuit board and for manufacturing electro-optical device |
Dec. 2, 2008 |
| 7459792 |
Via layout with via groups placed in interlocked arrangement |
Dec. 2, 2008 |
| 7459791 |
Post passivation interconnection schemes on top of IC chip |
Dec. 2, 2008 |
| 7459790 |
Post passivation interconnection schemes on top of the IC chips |
Dec. 2, 2008 |
| 7459786 |
Semiconductor device |
Dec. 2, 2008 |
| 7459777 |
Semiconductor package containing multi-layered semiconductor chips |
Dec. 2, 2008 |
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