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Class Information
Number: 257/774
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration > Via (interconnection hole) shape
Description: Subject matter wherein the shape or configuration of an electrical contact or lead is determined by the shape of a hole through an insulating layer through which the contact extends.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6777809 |
BEOL decoupling capacitor |
Aug. 17, 2004 |
| 6777812 |
Semiconductor devices having protected plug contacts and upper interconnections |
Aug. 17, 2004 |
| 6774473 |
Semiconductor chip module |
Aug. 10, 2004 |
| 6774486 |
Circuit boards containing vias and methods for producing same |
Aug. 10, 2004 |
| 6774488 |
Low leakage and low resistance for memory and the manufacturing method for the plugs |
Aug. 10, 2004 |
| 6774492 |
Chip package assembly having chip package mounted on printed circuit board |
Aug. 10, 2004 |
| 6774024 |
Semiconductor integrated circuit device having multilevel interconnection |
Aug. 10, 2004 |
| 6774315 |
Floating interposer |
Aug. 10, 2004 |
| 6770955 |
Shielded antenna in a semiconductor package |
Aug. 3, 2004 |
| 6770965 |
Wiring substrate using embedding resin |
Aug. 3, 2004 |
| 6770974 |
Semiconductor device and its manufacturing method |
Aug. 3, 2004 |
| 6768189 |
High power chip scale package |
Jul. 27, 2004 |
| 6768203 |
Open-bottomed via liner structure and method for fabricating same |
Jul. 27, 2004 |
| 6768204 |
Self-aligned conductive plugs in a semiconductor device |
Jul. 27, 2004 |
| 6768205 |
Thin-film circuit substrate |
Jul. 27, 2004 |
| 6768206 |
Organic substrate for flip chip bonding |
Jul. 27, 2004 |
| 6764774 |
Structures with improved adhesion to Si and C containing dielectrics and method for preparing the same |
Jul. 20, 2004 |
| 6765283 |
Semiconductor device with multi-layer interlayer dielectric film |
Jul. 20, 2004 |
| 6765296 |
Via-sea layout integrated circuits |
Jul. 20, 2004 |
| 6765299 |
Semiconductor device and the method for manufacturing the same |
Jul. 20, 2004 |
| 6762487 |
Stack arrangements of chips and interconnecting members |
Jul. 13, 2004 |
| 6762496 |
Substrate and production method therefor |
Jul. 13, 2004 |
| 6759720 |
Semiconductor device with transfer gate having gate insulating film and gate electrode layer |
Jul. 6, 2004 |
| 6759739 |
Multilayered substrate for semiconductor device |
Jul. 6, 2004 |
| 6756304 |
Method for producing via-connections in a substrate and substrate equipped with same |
Jun. 29, 2004 |
| 6756674 |
Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same |
Jun. 29, 2004 |
| 6756679 |
Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device |
Jun. 29, 2004 |
| 6756681 |
Radio frequency integrated circuit having increased substrate resistance enabling three dimensional interconnection with feedthroughs |
Jun. 29, 2004 |
| 6756682 |
High aspect ratio fill method and resulting structure |
Jun. 29, 2004 |
| 6756683 |
High-frequency semiconductor device including a semiconductor chip |
Jun. 29, 2004 |
| 6756687 |
Interfacial strengthening for electroless nickel immersion gold substrates |
Jun. 29, 2004 |
| 6756688 |
Wiring board and its production method, semiconductor device and its production method, and electronic apparatus |
Jun. 29, 2004 |
| 6753254 |
Method for forming a metallization layer |
Jun. 22, 2004 |
| 6753607 |
Structure for improving interlevel conductor connections |
Jun. 22, 2004 |
| 6753611 |
Semiconductor device, designing method thereof, and recording medium storing semiconductor designing program |
Jun. 22, 2004 |
| 6753612 |
Economical high density chip carrier |
Jun. 22, 2004 |
| 6750546 |
Flip-chip leadframe package |
Jun. 15, 2004 |
| 6747339 |
Integrated circuit having reduced soft errors and reduced penetration of alkali impurities into the substrate |
Jun. 8, 2004 |
| 6747355 |
Semiconductor device and method for manufacturing the same |
Jun. 8, 2004 |
| 6747356 |
Semiconductor device |
Jun. 8, 2004 |
| 6744122 |
Semiconductor device, method of manufacture thereof, circuit board, and electronic device |
Jun. 1, 2004 |
| 6744125 |
Super thin/super thermal ball grid array package |
Jun. 1, 2004 |
| 6740916 |
Contact structure for integrated circuit devices |
May. 25, 2004 |
| 6740975 |
Wiring substrate having no through holes formed in wiring correspondence regions |
May. 25, 2004 |
| 6740976 |
Semiconductor device including via contact plug with a discontinuous barrier layer |
May. 25, 2004 |
| 6740979 |
Semiconductor device and LSI defect analyzing method using the same |
May. 25, 2004 |
| 6737740 |
High performance silicon contact for flip chip |
May. 18, 2004 |
| 6737745 |
Method for relieving bond stress in an under-bond-pad resistor |
May. 18, 2004 |
| 6737748 |
Stacked via with specially designed landing pad for integrated semiconductor structures |
May. 18, 2004 |
| 6737749 |
Resistive vias for controlling impedance and terminating I/O signals at the package level |
May. 18, 2004 |
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