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Class Information
Number: 257/774
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration > Via (interconnection hole) shape
Description: Subject matter wherein the shape or configuration of an electrical contact or lead is determined by the shape of a hole through an insulating layer through which the contact extends.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6812577 |
Semiconductor contact structure having wide lower portion embedded in conductive material |
Nov. 2, 2004 |
| 6809337 |
Liquid crystal display devices having fill holes and electrical contacts on the back side of the die |
Oct. 26, 2004 |
| 6809407 |
Semiconductor device |
Oct. 26, 2004 |
| 6809420 |
Characterization of induced shift on an overlay target using post-etch artifact wafers |
Oct. 26, 2004 |
| 6809421 |
Multichip semiconductor device, chip therefor and method of formation thereof |
Oct. 26, 2004 |
| 6806572 |
Structure for contact formation using a silicon-germanium alloy |
Oct. 19, 2004 |
| 6806578 |
Copper pad structure |
Oct. 19, 2004 |
| 6806583 |
Light source |
Oct. 19, 2004 |
| 6803649 |
Electronic assembly |
Oct. 12, 2004 |
| 6803662 |
Low dielectric constant material reinforcement for improved electromigration reliability |
Oct. 12, 2004 |
| 6803666 |
Semiconductor chip mounting substrate and semiconductor device using the same |
Oct. 12, 2004 |
| 6800883 |
CMOS basic cell and method for fabricating semiconductor integrated circuit using the same |
Oct. 5, 2004 |
| 6800907 |
Method for fabricating semiconductor device |
Oct. 5, 2004 |
| 6800920 |
RF passive circuit and RF amplifier with via-holes |
Oct. 5, 2004 |
| 6800940 |
Low k dielectric composite layer for integrated circuit structure which provides void-free low k dielectric material between metal lines while mitigating via poisoning |
Oct. 5, 2004 |
| 6797611 |
Method of fabricating contact holes on a semiconductor chip |
Sep. 28, 2004 |
| 6797978 |
Method for fabricating an array of ultra-small pores for chalcogenide memory cells |
Sep. 28, 2004 |
| 6798048 |
2-Metal layer TAB tape and both-sided CSP.cndot.BGA tape |
Sep. 28, 2004 |
| 6794693 |
Semiconductor device and manufacturing method thereof |
Sep. 21, 2004 |
| 6794750 |
Semiconductor device |
Sep. 21, 2004 |
| 6791174 |
Semiconductor device with gel resin vibration limiting member |
Sep. 14, 2004 |
| 6791190 |
Self-aligned contact/borderless contact opening and method for forming same |
Sep. 14, 2004 |
| 6791191 |
Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations |
Sep. 14, 2004 |
| 6791192 |
Multiple chips bonded to packaging structure with low noise and multiple selectable functions |
Sep. 14, 2004 |
| 6787800 |
Test vehicle with zig-zag structures |
Sep. 7, 2004 |
| 6787905 |
Electric semiconductor element with a contact hole |
Sep. 7, 2004 |
| 6787906 |
Bit line pad and borderless contact on bit line stud with localized etch stop layer formed in an undermined region |
Sep. 7, 2004 |
| 6787907 |
Semiconductor device with dual damascene wiring |
Sep. 7, 2004 |
| 6787913 |
Ohmic contact plug having an improved crack free TiN barrier metal in a contact hole and method of forming the same |
Sep. 7, 2004 |
| 6787914 |
Tungsten-based interconnect that utilizes thin titanium nitride layer |
Sep. 7, 2004 |
| 6787916 |
Structures having a substrate with a cavity and having an integrated circuit bonded to a contact pad located in the cavity |
Sep. 7, 2004 |
| 6787928 |
Integrated circuit device having pads structure formed thereon and method for forming the same |
Sep. 7, 2004 |
| 6784530 |
Circuit component built-in module with embedded semiconductor chip and method of manufacturing |
Aug. 31, 2004 |
| 6784552 |
Structure having reduced lateral spacer erosion |
Aug. 31, 2004 |
| 6784553 |
Semiconductor device with self-aligned contact and method for manufacturing the device |
Aug. 31, 2004 |
| 6779783 |
Method and structure for tape ball grid array package |
Aug. 24, 2004 |
| 6781156 |
Recombination center diffusion controlled by carbon concentration |
Aug. 24, 2004 |
| 6781215 |
Intermediate base for a semiconductor module and a semiconductor module using the intermediate base |
Aug. 24, 2004 |
| 6781235 |
Three-level unitary interconnect structure |
Aug. 24, 2004 |
| 6781238 |
Semiconductor device and method of fabricating the same |
Aug. 24, 2004 |
| 6777802 |
Integrated circuit package substrate with multiple voltage supplies |
Aug. 17, 2004 |
| 6777809 |
BEOL decoupling capacitor |
Aug. 17, 2004 |
| 6777812 |
Semiconductor devices having protected plug contacts and upper interconnections |
Aug. 17, 2004 |
| 6774473 |
Semiconductor chip module |
Aug. 10, 2004 |
| 6774486 |
Circuit boards containing vias and methods for producing same |
Aug. 10, 2004 |
| 6774488 |
Low leakage and low resistance for memory and the manufacturing method for the plugs |
Aug. 10, 2004 |
| 6774492 |
Chip package assembly having chip package mounted on printed circuit board |
Aug. 10, 2004 |
| 6774024 |
Semiconductor integrated circuit device having multilevel interconnection |
Aug. 10, 2004 |
| 6774315 |
Floating interposer |
Aug. 10, 2004 |
| 6770955 |
Shielded antenna in a semiconductor package |
Aug. 3, 2004 |
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