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Class Information
Number: 257/774
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration > Via (interconnection hole) shape
Description: Subject matter wherein the shape or configuration of an electrical contact or lead is determined by the shape of a hole through an insulating layer through which the contact extends.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7019400 |
Semiconductor device having multilayer interconnection structure and method for manufacturing the device |
Mar. 28, 2006 |
| 7015137 |
Semiconductor device with reduced interconnection capacity |
Mar. 21, 2006 |
| 7015582 |
Dummy metal fill shapes for improved reliability of hybrid oxide/low-k dielectrics |
Mar. 21, 2006 |
| 7015585 |
Packaged integrated circuit having wire bonds and method therefor |
Mar. 21, 2006 |
| 7012019 |
Circuit barrier structure of semiconductor packaging substrate and method for fabricating the same |
Mar. 14, 2006 |
| 7012023 |
Semiconductor device and method of manufacturing the same |
Mar. 14, 2006 |
| 7012335 |
Semiconductor device wiring and method of manufacturing the same |
Mar. 14, 2006 |
| 7012337 |
Semiconductor device including a photosensitive resin covering at least a portion of a substrate having a via hole |
Mar. 14, 2006 |
| 7012811 |
Method of tuning a multi-path circuit |
Mar. 14, 2006 |
| 7009296 |
Semiconductor package with substrate coupled to a peripheral side surface of a semiconductor die |
Mar. 7, 2006 |
| 7009298 |
Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer |
Mar. 7, 2006 |
| 7005736 |
Semiconductor device power interconnect striping |
Feb. 28, 2006 |
| 7005737 |
Die-up ball grid array package with enhanced stiffener |
Feb. 28, 2006 |
| 7005746 |
Method for designing wiring connecting section and semiconductor device |
Feb. 28, 2006 |
| 7005752 |
Direct bumping on integrated circuit contacts enabled by metal-to-insulator adhesion |
Feb. 28, 2006 |
| 7002225 |
Compliant component for supporting electrical interface component |
Feb. 21, 2006 |
| 6998712 |
Semiconductor device and method for manufacturing the same |
Feb. 14, 2006 |
| 6998713 |
Wiring board and method for producing same |
Feb. 14, 2006 |
| 6998715 |
Grid array electronic component, wire reinforcing method for the same, and method of manufacturing the same |
Feb. 14, 2006 |
| 6995073 |
Air gap integration |
Feb. 7, 2006 |
| 6995447 |
Silicon on insulator device having trench isolation layer and method for manufacturing the same |
Feb. 7, 2006 |
| 6992375 |
Anchor for device package |
Jan. 31, 2006 |
| 6992393 |
Interconnect structure and method for fabricating the same |
Jan. 31, 2006 |
| 6989330 |
Semiconductor device and method of manufacture thereof |
Jan. 24, 2006 |
| 6989602 |
Dual damascene process with no passing metal features |
Jan. 24, 2006 |
| 6989603 |
nF-Opening Aiv Structures |
Jan. 24, 2006 |
| 6989604 |
Conformal barrier liner in an integrated circuit interconnect |
Jan. 24, 2006 |
| 6984886 |
System-on-a-chip with multi-layered metallized through-hole interconnection |
Jan. 10, 2006 |
| 6984893 |
Low temperature nitride used as Cu barrier layer |
Jan. 10, 2006 |
| 6984894 |
Semiconductor package having a partial slot cover for encapsulation process |
Jan. 10, 2006 |
| 6982487 |
Wafer level package and multi-package stack |
Jan. 3, 2006 |
| 6979897 |
Package substrate for improving electrical performance |
Dec. 27, 2005 |
| 6979898 |
Semiconductor component and a method of fabricating the semiconductor component |
Dec. 27, 2005 |
| 6975033 |
Semiconductor device and method for manufacturing the same |
Dec. 13, 2005 |
| 6976238 |
Circular vias and interconnect-line ends |
Dec. 13, 2005 |
| 6972464 |
Power MOSFET |
Dec. 6, 2005 |
| 6972488 |
Semiconductor device in which a semiconductor chip mounted on a printed circuit is sealed with a molded resin |
Dec. 6, 2005 |
| 6972492 |
Method and structure to form capacitor in copper damascene process for integrated circuit devices |
Dec. 6, 2005 |
| 6969674 |
Structure and method for fine pitch flip chip substrate |
Nov. 29, 2005 |
| 6969909 |
Flip chip FET device |
Nov. 29, 2005 |
| 6969911 |
Wiring structure of semiconductor device and production method of the device |
Nov. 29, 2005 |
| 6967161 |
Method and resulting structure for fabricating DRAM cell structure using oxide line spacer |
Nov. 22, 2005 |
| 6967389 |
Wafer with semiconductor chips mounted thereon |
Nov. 22, 2005 |
| 6967398 |
Module power distribution network |
Nov. 22, 2005 |
| 6967408 |
Gate stack structure |
Nov. 22, 2005 |
| 6967409 |
Semiconductor device and method of manufacturing the same |
Nov. 22, 2005 |
| 6963139 |
Semiconductor device including a layer having a .beta.-crystal structure |
Nov. 8, 2005 |
| 6963142 |
Flip chip integrated package mount support |
Nov. 8, 2005 |
| 6963494 |
Blind hole termination of pin to pcb |
Nov. 8, 2005 |
| 6960822 |
Solder mask and structure of a substrate |
Nov. 1, 2005 |
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