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Class Information
Number: 257/774
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration > Via (interconnection hole) shape
Description: Subject matter wherein the shape or configuration of an electrical contact or lead is determined by the shape of a hole through an insulating layer through which the contact extends.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7056823 |
Backend metallization method and device obtained therefrom |
Jun. 6, 2006 |
| 7056828 |
Sidewall spacer structure for self-aligned contact and method for forming the same |
Jun. 6, 2006 |
| 7057270 |
Systems and methods for stacking chip components |
Jun. 6, 2006 |
| 7057287 |
Dual damascene integration of ultra low dielectric constant porous materials |
Jun. 6, 2006 |
| 7057289 |
Etch stop in damascene interconnect structure and method of making |
Jun. 6, 2006 |
| 7053462 |
Planarization of metal container structures |
May. 30, 2006 |
| 7053468 |
IC substrate having over voltage protection function |
May. 30, 2006 |
| 7053486 |
Semiconductor device with improved design freedom of external terminal |
May. 30, 2006 |
| 7054052 |
Adhesive sacrificial bonding of spatial light modulators |
May. 30, 2006 |
| 7054161 |
Slotted adhesive for die-attach in BOC and LOC packages |
May. 30, 2006 |
| 7049667 |
Conductive channel pseudo block process and circuit to inhibit reverse engineering |
May. 23, 2006 |
| 7049687 |
Tape carrier package having stacked semiconductor elements, and short and long leads |
May. 23, 2006 |
| 7049693 |
Electrical contact array for substrate assemblies |
May. 23, 2006 |
| 7049697 |
Process for making fine pitch connections between devices and structure made by the process |
May. 23, 2006 |
| 7049701 |
Semiconductor device using insulating film of low dielectric constant as interlayer insulating film |
May. 23, 2006 |
| 7049702 |
Damascene structure at semiconductor substrate level |
May. 23, 2006 |
| 7049703 |
Semiconductor device having a tapered interconnection with insulating material on conductive sidewall thereof within through hole |
May. 23, 2006 |
| 7049705 |
Chip structure |
May. 23, 2006 |
| 7049229 |
Method of fabricating semiconductor device and semiconductor device |
May. 23, 2006 |
| 7045198 |
Prepreg and circuit board and method for manufacturing the same |
May. 16, 2006 |
| 7045886 |
Semiconductor device and method of fabricating the same |
May. 16, 2006 |
| 7045896 |
Metal interconnect layer of semiconductor device and method for forming a metal interconnect layer |
May. 16, 2006 |
| 7045898 |
Semiconductor device and manufacturing method thereof |
May. 16, 2006 |
| 7045901 |
Chip-on-chip connection with second chip located in rectangular open window hole in printed circuit board |
May. 16, 2006 |
| 7042074 |
Power semiconductor module and method for producing it |
May. 9, 2006 |
| 7042091 |
Fluorinated hard mask for micropatterning of polymers |
May. 9, 2006 |
| 7042095 |
Semiconductor device including an interconnect having copper as a main component |
May. 9, 2006 |
| 7042097 |
Structure for reducing stress-induced voiding in an interconnect of integrated circuits |
May. 9, 2006 |
| 7042098 |
Bonding pad for a packaged integrated circuit |
May. 9, 2006 |
| 7042099 |
Semiconductor device containing a dummy wire |
May. 9, 2006 |
| 7038320 |
Single damascene integration scheme for preventing copper contamination of dielectric layer |
May. 2, 2006 |
| 7038323 |
Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument |
May. 2, 2006 |
| 7034335 |
ITO film contact structure, TFT substrate and manufacture thereof |
Apr. 25, 2006 |
| 7034398 |
Semiconductor device having contact plug and buried conductive film therein |
Apr. 25, 2006 |
| 7034399 |
Forming a porous dielectric layer |
Apr. 25, 2006 |
| 7034402 |
Device with segmented ball limiting metallurgy |
Apr. 25, 2006 |
| 7030466 |
Intermediate structure for making integrated circuit device and wafer |
Apr. 18, 2006 |
| 7030480 |
Multilayer board and a semiconductor device |
Apr. 18, 2006 |
| 7030497 |
Localized slots for stress relieve in copper |
Apr. 18, 2006 |
| 7030498 |
Semiconductor device with copper wirings having improved negative bias temperature instability (NBTI) |
Apr. 18, 2006 |
| 7030499 |
Semiconductor constructions |
Apr. 18, 2006 |
| 7030500 |
Package substrate manufactured using electrolytic leadless plating process, and method for manufacturing the same |
Apr. 18, 2006 |
| 7030508 |
Substrate for semiconductor package and wire bonding method using thereof |
Apr. 18, 2006 |
| 7026691 |
Minimizing transistor size in integrated circuits |
Apr. 11, 2006 |
| 7026699 |
Semiconductor device and method for fabricating the same |
Apr. 11, 2006 |
| 7026719 |
Semiconductor package with a heat spreader |
Apr. 11, 2006 |
| 7023094 |
Semiconductor integrated circuit device having diagonal direction wiring and layout method therefor |
Apr. 4, 2006 |
| 7023095 |
Carrier |
Apr. 4, 2006 |
| 7018919 |
Method of manufacturing a semiconductor integrated circuit device including a hole formed in an insulating film and a first conductive film formed over a bottom region and sidewalls of the hol |
Mar. 28, 2006 |
| 7019347 |
Dynamic random access memory circuitry comprising insulative collars |
Mar. 28, 2006 |
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