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Class Information
Number: 257/774
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration > Via (interconnection hole) shape
Description: Subject matter wherein the shape or configuration of an electrical contact or lead is determined by the shape of a hole through an insulating layer through which the contact extends.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7148572 |
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation |
Dec. 12, 2006 |
| 7148554 |
Discrete electronic component arrangement including anchoring, thermally conductive pad |
Dec. 12, 2006 |
| 7148535 |
Zero capacitance bondpad utilizing active negative capacitance |
Dec. 12, 2006 |
| 7145241 |
Semiconductor device having a multilayer interconnection structure and fabrication process thereof |
Dec. 5, 2006 |
| 7145228 |
Microelectronic devices |
Dec. 5, 2006 |
| 7141884 |
Module with a built-in semiconductor and method for producing the same |
Nov. 28, 2006 |
| 7141881 |
Semiconductor device having a multilayer interconnection structure, fabrication method thereof, and designing method thereof |
Nov. 28, 2006 |
| 7141880 |
Metal line stacking structure in semiconductor device and formation method thereof |
Nov. 28, 2006 |
| 7141872 |
Semiconductor device and method of manufacturing semiconductor device |
Nov. 28, 2006 |
| 7138722 |
Semiconductor device |
Nov. 21, 2006 |
| 7138720 |
Semiconductor component assemblies having interconnects |
Nov. 21, 2006 |
| 7138719 |
Trench interconnect structure and formation method |
Nov. 21, 2006 |
| 7138708 |
Electronic system for fixing power and signal semiconductor chips |
Nov. 21, 2006 |
| 7135783 |
Contact etching utilizing partially recessed hard mask |
Nov. 14, 2006 |
| 7135779 |
Method for packaging integrated circuit chips |
Nov. 14, 2006 |
| 7135777 |
Devices having compliant wafer-level input/output interconnections and packages using pillars and methods of fabrication thereof |
Nov. 14, 2006 |
| 7135776 |
Semiconductor device and method for manufacturing same |
Nov. 14, 2006 |
| 7135774 |
Heat resistant ohmic electrode and method of manufacturing the same |
Nov. 14, 2006 |
| 7132732 |
Semiconductor device having two distinct sioch layers |
Nov. 7, 2006 |
| 7129567 |
Substrate, semiconductor die, multichip module, and system including a via structure comprising a plurality of conductive elements |
Oct. 31, 2006 |
| 7129534 |
Magneto-resistive memory and method of manufacturing the same |
Oct. 31, 2006 |
| 7129531 |
Programmable resistance memory element with titanium rich adhesion layer |
Oct. 31, 2006 |
| 7126381 |
VPA interconnect circuit |
Oct. 24, 2006 |
| 7126224 |
Semiconductor substrate-based interconnection assembly for semiconductor device bearing external connection elements |
Oct. 24, 2006 |
| 7126195 |
Method for forming a metallization layer |
Oct. 24, 2006 |
| 7122912 |
Chip and multi-chip semiconductor device using thereof and method for manufacturing same |
Oct. 17, 2006 |
| 7122907 |
Interposer substrate and wafer scale interposer substrate member for use with flip-chip configured semiconductor dice |
Oct. 17, 2006 |
| 7122904 |
Semiconductor packaging device and manufacture thereof |
Oct. 17, 2006 |
| 7122903 |
Contact plug processing and a contact plug |
Oct. 17, 2006 |
| 7122901 |
Semiconductor device |
Oct. 17, 2006 |
| 7119444 |
Versatile system for charge dissipation in the formation of semiconductor device structures |
Oct. 10, 2006 |
| 7119441 |
Semiconductor interconnect structure |
Oct. 10, 2006 |
| 7119439 |
Semiconductor device and method for manufacturing the same |
Oct. 10, 2006 |
| 7119010 |
Integrated circuit with self-aligned line and via and manufacturing method therefor |
Oct. 10, 2006 |
| 7119005 |
Semiconductor local interconnect and contact |
Oct. 10, 2006 |
| 7115999 |
Semiconductor device and method of manufacturing the same |
Oct. 3, 2006 |
| 7115996 |
Method to selectively cap interconnects with indium or tin bronzes and/or oxides thereof and the interconnect so capped |
Oct. 3, 2006 |
| 7115992 |
Electrode structure for use in an integrated circuit |
Oct. 3, 2006 |
| 7115956 |
Conductive film as the connector for thin film display device |
Oct. 3, 2006 |
| 7112886 |
Packaging structure with a plurality of drill holes formed directly below an underfill layer |
Sep. 26, 2006 |
| 7112866 |
Method to form a cross network of air gaps within IMD layer |
Sep. 26, 2006 |
| 7112840 |
Semiconductor memory device and method for fabricating the same |
Sep. 26, 2006 |
| 7109109 |
Contact plug in semiconductor device and method of forming the same |
Sep. 19, 2006 |
| 7105918 |
Interposer with flexible solder pad elements and methods of manufacturing the same |
Sep. 12, 2006 |
| 7105926 |
Routing scheme for differential pairs in flip chip substrates |
Sep. 12, 2006 |
| 7105928 |
Copper wiring with high temperature superconductor (HTS) layer |
Sep. 12, 2006 |
| 7102217 |
Interposer substrates with reinforced interconnect slots, and semiconductor die packages including same |
Sep. 5, 2006 |
| 7098497 |
Semiconductor device using high-dielectric-constant material and method of manufacturing the same |
Aug. 29, 2006 |
| 7098515 |
Semiconductor chip with borderless contact that avoids well leakage |
Aug. 29, 2006 |
| 7098535 |
Semiconductor package and packaging method using flip-chip bonding technology |
Aug. 29, 2006 |
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