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Browse by Category: Main > Physics
Class Information
Number: 257/774
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration > Via (interconnection hole) shape
Description: Subject matter wherein the shape or configuration of an electrical contact or lead is determined by the shape of a hole through an insulating layer through which the contact extends.










Patents under this class:

Patent Number Title Of Patent Date Issued
8710681 Isolation rings for blocking the interface between package components and the respective molding compound Apr. 29, 2014
8710676 Stacked structure and stacked method for three-dimensional chip Apr. 29, 2014
8710674 Internal wiring structure of semiconductor device Apr. 29, 2014
8710673 Wiring structure in a semiconductor device, method of forming the wiring structure, semiconductor device including the wiring structure and method of manufacturing the semiconductor device Apr. 29, 2014
8710672 Semiconductor device and method of manufacturing the same Apr. 29, 2014
8710671 Multi-level integrated circuit, device and method for modeling multi-level integrated circuits Apr. 29, 2014
8710670 Integrated circuit packaging system with coupling features and method of manufacture thereof Apr. 29, 2014
8710669 Semiconductor device manufacture in which minimum wiring pitch of connecting portion wiring layer is less than minimum wiring pitch of any other wiring layer Apr. 29, 2014
8710668 Integrated circuit packaging system with laser hole and method of manufacture thereof Apr. 29, 2014
8710658 Under bump passive components in wafer level packaging Apr. 29, 2014
8710655 Die packages and systems having the die packages Apr. 29, 2014
8710652 Embedded package and method for manufacturing the same Apr. 29, 2014
8710650 Semiconductor devices having through electrodes and methods of fabricating the same Apr. 29, 2014
8710648 Wafer level packaging structure with large contact area and preparation method thereof Apr. 29, 2014
8710639 Semiconductor element-embedded wiring substrate Apr. 29, 2014
8710629 Apparatus and method for controlling semiconductor die warpage Apr. 29, 2014
8710591 Semiconductor chip, stack module, and memory card Apr. 29, 2014
8709945 Area efficient through-hole connections Apr. 29, 2014
8709940 Structure of circuit board and method for fabricating the same Apr. 29, 2014
8704377 Compliant conductive nano-particle electrical interconnect Apr. 22, 2014
8704376 Layout of memory strap cell Apr. 22, 2014
8704375 Barrier structures and methods for through substrate vias Apr. 22, 2014
8704372 Integrated circuits and methods for processing integrated circuits with embedded features Apr. 22, 2014
8704364 Reducing stress in multi-die integrated circuit structures Apr. 22, 2014
8704363 Interface plate between integrated circuits Apr. 22, 2014
8704359 Method for manufacturing an electronic module and an electronic module Apr. 22, 2014
8704284 Semiconductor device having bit line expanding islands Apr. 22, 2014
8703610 Semiconductor device and method of forming conductive TSV with insulating annular ring Apr. 22, 2014
8703602 Selective seed layer treatment for feature plating Apr. 22, 2014
8692384 Semiconductor device with through silicon via and alignment mark Apr. 8, 2014
8692383 Semiconductor device and method of manufacturing the same Apr. 8, 2014
8692382 Chip package Apr. 8, 2014
8692381 Integrated circuits with a resistance to single event upset occurrence and methods for providing the same Apr. 8, 2014
8692364 Semiconductor device and method for manufacturing the same Apr. 8, 2014
8692359 Through silicon via structure having protection ring Apr. 8, 2014
8692358 Image sensor chip package and method for forming the same Apr. 8, 2014
8691699 Manufacturing method of semiconductor device and semiconductor device Apr. 8, 2014
8691632 Wafer level package and fabrication method Apr. 8, 2014
8686568 Semiconductor package substrates having layered circuit segments, and related methods Apr. 1, 2014
8686567 Semiconductor device having plural wiring layers Apr. 1, 2014
8686565 Stacked chip assembly having vertical vias Apr. 1, 2014
8686542 Compliant monopolar micro device transfer head with silicon electrode Apr. 1, 2014
8686519 MEMS accelerometer using capacitive sensing and production method thereof Apr. 1, 2014
8685793 Chip assembly having via interconnects joined by plating Apr. 1, 2014
8680689 Coplanar waveguide for stacked multi-chip systems Mar. 25, 2014
8680684 Stackable microelectronic package structures Mar. 25, 2014
8680683 Wafer level package with embedded passive components and method of manufacturing Mar. 25, 2014
8680674 Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices Mar. 25, 2014
8680654 Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods Mar. 25, 2014
8680598 Trench structure and method of forming the trench structure Mar. 25, 2014











 
 
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