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Class Information
Number: 257/773
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration
Description: Subject matter in which an electrical contact or lead has a specific configuration or shape.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7199471 |
Method and apparatus for reducing capacitive coupling between lines in an integrated circuit |
Apr. 3, 2007 |
| 7199470 |
Surface-mountable semiconductor component and method for producing it |
Apr. 3, 2007 |
| 7199035 |
Interconnect junction providing reduced current crowding and method of manufacturing same |
Apr. 3, 2007 |
| 7196409 |
Semiconductor device, semiconductor body and method of manufacturing thereof |
Mar. 27, 2007 |
| 7193324 |
Circuit structure of package substrate |
Mar. 20, 2007 |
| 7190080 |
Semiconductor chip assembly with embedded metal pillar |
Mar. 13, 2007 |
| 7190073 |
Circuit film with bump, film package using the same, and related fabrication methods |
Mar. 13, 2007 |
| 7185428 |
Method of making a circuitized substrate |
Mar. 6, 2007 |
| 7183639 |
Semiconductor device and method of manufacturing the same |
Feb. 27, 2007 |
| 7180170 |
Lead-free integrated circuit package structure |
Feb. 20, 2007 |
| 7180142 |
Semiconductor device |
Feb. 20, 2007 |
| 7173339 |
Semiconductor device having a substrate an undoped silicon oxide structure and an overlaying doped silicon oxide structure with a sidewall terminating at the undoped silicon oxide structure |
Feb. 6, 2007 |
| 7173336 |
Hybrid integrated circuit device |
Feb. 6, 2007 |
| 7173321 |
Semiconductor package having multiple row of leads |
Feb. 6, 2007 |
| 7173271 |
Phase-change memory device and method of manufacturing the same |
Feb. 6, 2007 |
| 7170187 |
Low stress conductive polymer bump |
Jan. 30, 2007 |
| 7170180 |
Methods and systems for improved current sharing between parallel power semiconductors in power converters |
Jan. 30, 2007 |
| 7170179 |
Chip select method through double bonding |
Jan. 30, 2007 |
| 7170175 |
Semiconductor device and production method thereof |
Jan. 30, 2007 |
| 7170168 |
Flip-chip semiconductor package with lead frame and method for fabricating the same |
Jan. 30, 2007 |
| 7166898 |
Flip chip FET device |
Jan. 23, 2007 |
| 7164204 |
Integrated circuit devices with an auxiliary pad for contact hole alignment |
Jan. 16, 2007 |
| 7164196 |
Semiconductor device |
Jan. 16, 2007 |
| 7157734 |
Semiconductor bond pad structures and methods of manufacturing thereof |
Jan. 2, 2007 |
| 7154187 |
Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device |
Dec. 26, 2006 |
| 7154184 |
Interconnection structure of semiconductor device |
Dec. 26, 2006 |
| 7148574 |
Bonding pad structure and method of forming the same |
Dec. 12, 2006 |
| 7148565 |
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack |
Dec. 12, 2006 |
| 7148554 |
Discrete electronic component arrangement including anchoring, thermally conductive pad |
Dec. 12, 2006 |
| 7148535 |
Zero capacitance bondpad utilizing active negative capacitance |
Dec. 12, 2006 |
| 7148504 |
Semiconductor device |
Dec. 12, 2006 |
| 7146597 |
CAD method for arranging via-holes, a CAD tool, photomasks produced by the CAD method, a semiconductor integrated circuit manufactured with photomasks and a computer program product for execut |
Dec. 5, 2006 |
| 7145252 |
Configuration for testing the bonding positions of conductive drops and test method for using the same |
Dec. 5, 2006 |
| 7145246 |
Method of fabricating an ultra-narrow channel semiconductor device |
Dec. 5, 2006 |
| 7141880 |
Metal line stacking structure in semiconductor device and formation method thereof |
Nov. 28, 2006 |
| 7138723 |
Deformable semiconductor device |
Nov. 21, 2006 |
| 7138719 |
Trench interconnect structure and formation method |
Nov. 21, 2006 |
| 7138708 |
Electronic system for fixing power and signal semiconductor chips |
Nov. 21, 2006 |
| 7138068 |
Printed circuit patterned embedded capacitance layer |
Nov. 21, 2006 |
| 7135777 |
Devices having compliant wafer-level input/output interconnections and packages using pillars and methods of fabrication thereof |
Nov. 14, 2006 |
| 7135754 |
Chip type solid electrolytic capacitor having a small size and a simple structure |
Nov. 14, 2006 |
| 7132736 |
Devices having compliant wafer-level packages with pillars and methods of fabrication |
Nov. 7, 2006 |
| 7132735 |
Integrated circuit package with lead fingers extending into a slot of a die paddle |
Nov. 7, 2006 |
| 7126195 |
Method for forming a metallization layer |
Oct. 24, 2006 |
| 7122907 |
Interposer substrate and wafer scale interposer substrate member for use with flip-chip configured semiconductor dice |
Oct. 17, 2006 |
| 7122901 |
Semiconductor device |
Oct. 17, 2006 |
| 7122401 |
Area array type semiconductor package fabrication method |
Oct. 17, 2006 |
| 7119439 |
Semiconductor device and method for manufacturing the same |
Oct. 10, 2006 |
| 7119430 |
Spacer for mounting a chip package to a substrate |
Oct. 10, 2006 |
| 7116001 |
Bumped die and wire bonded board-on-chip package |
Oct. 3, 2006 |
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