| |
 |
|
Class Information
Number: 257/773
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration
Description: Subject matter in which an electrical contact or lead has a specific configuration or shape.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7071574 |
Semiconductor device and its wiring method |
Jul. 4, 2006 |
| 7067919 |
Semiconductor device |
Jun. 27, 2006 |
| 7064431 |
Electronic assembly having select spacing of rows and columns of contacts to allow for routing of traces to the contacts |
Jun. 20, 2006 |
| 7064442 |
Integrated circuit package device |
Jun. 20, 2006 |
| 7064450 |
Semiconductor die with high density offset-inline bond arrangement |
Jun. 20, 2006 |
| 7060537 |
Microchip controller board manufacturing method |
Jun. 13, 2006 |
| 7061083 |
Semiconductor devices |
Jun. 13, 2006 |
| 7061094 |
Multilayer printed circuit board including first and second signal traces and a first ground trace |
Jun. 13, 2006 |
| 7061095 |
Printed circuit board conductor channeling |
Jun. 13, 2006 |
| 7061112 |
Semiconductor device including an electrical contact connected to an interconnection |
Jun. 13, 2006 |
| 7061115 |
Interconnect line selectively isolated from an underlying contact plug |
Jun. 13, 2006 |
| 7061116 |
Arrangement of vias in a substrate to support a ball grid array |
Jun. 13, 2006 |
| 7061117 |
Bump layout on silicon chip |
Jun. 13, 2006 |
| 7056823 |
Backend metallization method and device obtained therefrom |
Jun. 6, 2006 |
| 7057292 |
Solder bar for high power flip chips |
Jun. 6, 2006 |
| 7049180 |
Method of fabricating a memory transistor array utilizing insulated word lines as gate electrodes |
May. 23, 2006 |
| 7049667 |
Conductive channel pseudo block process and circuit to inhibit reverse engineering |
May. 23, 2006 |
| 7049687 |
Tape carrier package having stacked semiconductor elements, and short and long leads |
May. 23, 2006 |
| 7049693 |
Electrical contact array for substrate assemblies |
May. 23, 2006 |
| 7049701 |
Semiconductor device using insulating film of low dielectric constant as interlayer insulating film |
May. 23, 2006 |
| 7045893 |
Semiconductor package and method for manufacturing the same |
May. 16, 2006 |
| 7042080 |
Semiconductor interconnect having compliant conductive contacts |
May. 9, 2006 |
| 7042095 |
Semiconductor device including an interconnect having copper as a main component |
May. 9, 2006 |
| 7042096 |
Single semiconductor element in a flip chip construction |
May. 9, 2006 |
| 7042098 |
Bonding pad for a packaged integrated circuit |
May. 9, 2006 |
| 7042100 |
Damascene interconnection and semiconductor device |
May. 9, 2006 |
| 7042103 |
Low stress semiconductor die attach |
May. 9, 2006 |
| 7037820 |
Cross-fill pattern for metal fill levels, power supply filtering, and analog circuit shielding |
May. 2, 2006 |
| 7038317 |
Semiconductor device and method of manufacturing same |
May. 2, 2006 |
| 7038319 |
Apparatus and method to reduce signal cross-talk |
May. 2, 2006 |
| 7038323 |
Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument |
May. 2, 2006 |
| 7034385 |
Topless semiconductor package |
Apr. 25, 2006 |
| 7034398 |
Semiconductor device having contact plug and buried conductive film therein |
Apr. 25, 2006 |
| 7030479 |
Integrated circuit die and/or package having a variable pitch contact array for maximization of number of signal lines per routing layer |
Apr. 18, 2006 |
| 7030496 |
Semiconductor device having aluminum and metal electrodes and method for manufacturing the same |
Apr. 18, 2006 |
| 7026664 |
DC-DC converter implemented in a land grid array package |
Apr. 11, 2006 |
| 7026717 |
Fill pattern generation for spin-on glass and related self-planarization deposition |
Apr. 11, 2006 |
| 7023058 |
Semiconductor integrated circuit device |
Apr. 4, 2006 |
| 7023061 |
Memory transistor array utilizing insulated word lines as gate electrodes |
Apr. 4, 2006 |
| 7023067 |
Bond pad design |
Apr. 4, 2006 |
| 7023086 |
Semiconductor component arrangement with a reduced oscillation tendency |
Apr. 4, 2006 |
| 7023090 |
Bonding pad and via structure design |
Apr. 4, 2006 |
| 7023095 |
Carrier |
Apr. 4, 2006 |
| 7019335 |
Light-emitting apparatus |
Mar. 28, 2006 |
| 7019392 |
Storage apparatus, card type storage apparatus, and electronic apparatus |
Mar. 28, 2006 |
| 7019400 |
Semiconductor device having multilayer interconnection structure and method for manufacturing the device |
Mar. 28, 2006 |
| 7019402 |
Silicon chip carrier with through-vias using laser assisted chemical vapor deposition of conductor |
Mar. 28, 2006 |
| 7015512 |
High power flip chip LED |
Mar. 21, 2006 |
| 7015584 |
High force metal plated spring structure |
Mar. 21, 2006 |
| 7015585 |
Packaged integrated circuit having wire bonds and method therefor |
Mar. 21, 2006 |
|
|
|
