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Class Information
Number: 257/773
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration
Description: Subject matter in which an electrical contact or lead has a specific configuration or shape.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7518241 |
Wafer structure with a multi-layer barrier in an UBM layer network device with power supply |
Apr. 14, 2009 |
| 7518239 |
Semiconductor device with substrate having penetrating hole having a protrusion |
Apr. 14, 2009 |
| 7518223 |
Semiconductor devices and semiconductor device assemblies including a nonconfluent spacer layer |
Apr. 14, 2009 |
| 7518211 |
Chip and package structure |
Apr. 14, 2009 |
| 7514768 |
Package structure for a semiconductor device incorporating enhanced solder bump structure |
Apr. 7, 2009 |
| 7511378 |
Enhancement of performance of a conductive wire in a multilayered substrate |
Mar. 31, 2009 |
| 7511369 |
BGA-scale stacks comprised of layers containing integrated circuit die and a method for making the same |
Mar. 31, 2009 |
| 7509615 |
Circuit layout structure and method |
Mar. 24, 2009 |
| 7508078 |
Electronic device, method for manufacturing electronic device, contact hole of electronic device, method for forming contact hole of electronic device |
Mar. 24, 2009 |
| 7508072 |
Semiconductor device with pad electrode for testing and manufacturing method of the same |
Mar. 24, 2009 |
| 7508059 |
Stacked chip package with redistribution lines |
Mar. 24, 2009 |
| 7504729 |
Semiconductor device with extraction electrode |
Mar. 17, 2009 |
| 7504724 |
Semiconductor device |
Mar. 17, 2009 |
| 7504717 |
Semiconductor device |
Mar. 17, 2009 |
| 7501709 |
BGA package with wiring schemes having reduced current loop paths to improve cross talk control and characteristic impedance |
Mar. 10, 2009 |
| 7501705 |
Configuration terminal for integrated devices and method for configuring an integrated device |
Mar. 10, 2009 |
| 7501701 |
Rewiring substrate strip having a plurality of semiconductor component positions |
Mar. 10, 2009 |
| 7498674 |
Semiconductor module having a coupling substrate, and methods for its production |
Mar. 3, 2009 |
| 7498183 |
Fabrication of conductive micro traces using a deform and selective removal process |
Mar. 3, 2009 |
| 7495343 |
Pad over active circuit system and method with frame support structure |
Feb. 24, 2009 |
| 7495335 |
Method of reducing process steps in metal line protective structure formation |
Feb. 24, 2009 |
| 7495331 |
Semiconductor device, manufacturing method for semiconductor device, electronic component, circuit substrate, and electronic apparatus |
Feb. 24, 2009 |
| 7495326 |
Stacked electronic structures including offset substrates |
Feb. 24, 2009 |
| 7489040 |
Interconnection structure of semiconductor device |
Feb. 10, 2009 |
| 7485973 |
Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument |
Feb. 3, 2009 |
| 7485959 |
Structure for joining a semiconductor package to a substrate using a solder column |
Feb. 3, 2009 |
| 7485952 |
Drop resistant bumpers for fully molded memory cards |
Feb. 3, 2009 |
| 7479704 |
Substrate improving immobilization of ball pads for BGA packages |
Jan. 20, 2009 |
| 7479697 |
Resilient carrier assembly for an integrated circuit |
Jan. 20, 2009 |
| 7476983 |
Semiconductor device including wire bonding pads and pad layout method |
Jan. 13, 2009 |
| 7476973 |
Method of manufacturing a semiconductor device having a silicidation blocking layer |
Jan. 13, 2009 |
| 7476972 |
Circuit device, manufacturing method thereof, and sheet-like board member |
Jan. 13, 2009 |
| 7476965 |
Electronic device with integrated heat distributor |
Jan. 13, 2009 |
| 7473999 |
Semiconductor chip and process for forming the same |
Jan. 6, 2009 |
| 7470987 |
Semiconductor device and its manufacture method capable of preventing short circuit of electrodes when semiconductor device is mounted on sub-mount substrate |
Dec. 30, 2008 |
| 7470971 |
Anodically bonded ultra-high-vacuum cell |
Dec. 30, 2008 |
| 7468558 |
Devices having compliant wafer-level input/output interconnections and packages using pillars and methods of fabrication thereof |
Dec. 23, 2008 |
| 7468544 |
Structure and process for WL-CSP with metal cover |
Dec. 23, 2008 |
| 7466027 |
Interconnect structures with surfaces roughness improving liner and methods for fabricating the same |
Dec. 16, 2008 |
| 7466021 |
Memory packages having stair step interconnection layers |
Dec. 16, 2008 |
| 7466015 |
Supporting frame for surface-mount diode package |
Dec. 16, 2008 |
| 7462938 |
Post passivation interconnection schemes on top of IC chip |
Dec. 9, 2008 |
| 7459792 |
Via layout with via groups placed in interlocked arrangement |
Dec. 2, 2008 |
| 7459791 |
Post passivation interconnection schemes on top of IC chip |
Dec. 2, 2008 |
| 7459790 |
Post passivation interconnection schemes on top of the IC chips |
Dec. 2, 2008 |
| 7459789 |
Bonding method of flexible film and display bonded thereby |
Dec. 2, 2008 |
| 7459787 |
Multi-layered copper line structure of semiconductor device and method for forming the same |
Dec. 2, 2008 |
| 7459777 |
Semiconductor package containing multi-layered semiconductor chips |
Dec. 2, 2008 |
| 7456501 |
Semiconductor structure having recess with conductive metal |
Nov. 25, 2008 |
| 7454831 |
Method for mounting an electronic element on a wiring board |
Nov. 25, 2008 |
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