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Browse by Category: Main > Physics
Class Information
Number: 257/773
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration
Description: Subject matter in which an electrical contact or lead has a specific configuration or shape.


Sub-classes under this class:

Class Number Class Name Patents
257/776 Cross-over arrangement, component or structure 676
257/775 Varying width or thickness of conductor 731
257/774 Via (interconnection hole) shape 2,283


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Next

Patent Number Title Of Patent Date Issued
6614056 Scalable led with improved current spreading structures Sep. 2, 2003
6614111 Semiconductor device using bumps, method for fabricating same, and method for forming bumps Sep. 2, 2003
6614113 Semiconductor device and method for producing the same Sep. 2, 2003
6614117 Method for metallization of a semiconductor substrate and related structure Sep. 2, 2003
6614120 Semiconductor device Sep. 2, 2003
6608372 Surface mountable chip type semiconductor device and manufacturing method Aug. 19, 2003
6608382 Metal bump Aug. 19, 2003
6608385 Contact structure and production method thereof and probe contact assembly using same Aug. 19, 2003
6608386 Sub-nanoscale electronic devices and processes Aug. 19, 2003
6605532 Structure for an electrical contact to a thin film in a semiconductor structure and method for making the same Aug. 12, 2003
6603145 High temperature circuit apparatus Aug. 5, 2003
6603178 Semiconductor integrated circuit device and method of manufacture thereof Aug. 5, 2003
6600191 Method of fabricating conductive straps to interconnect contacts to corresponding digit lines by employing an angled sidewall implant and semiconductor devices fabricated thereby Jul. 29, 2003
6600217 Mounting substrate and mounting method for semiconductor device Jul. 29, 2003
6600221 Semiconductor device with stacked semiconductor chips Jul. 29, 2003
6600225 Semiconductor device with elongated interconnecting member and fabrication method thereof Jul. 29, 2003
6596634 Wiring board and fabricating method thereof, semiconductor device and fabricating method thereof, circuit board and electronic instrument Jul. 22, 2003
6593622 Power mosfet with integrated drivers in a common package Jul. 15, 2003
6593648 Semiconductor device and method of making the same, circuit board and electronic equipment Jul. 15, 2003
6593658 Chip package capable of reducing moisture penetration Jul. 15, 2003
6590290 Stacked via in copper/polyimide BEOL Jul. 8, 2003
6586830 Semiconductor device with an interposer Jul. 1, 2003
6586839 Approach to structurally reinforcing the mechanical performance of silicon level interconnect layers Jul. 1, 2003
6586841 Mechanical landing pad formed on the underside of a MEMS device Jul. 1, 2003
6583030 Method for producing an integrated circuit processed on both sides Jun. 24, 2003
6583509 Semiconductor processing techniques Jun. 24, 2003
6583514 Semiconductor device with a binary alloy bonding layer Jun. 24, 2003
6583516 Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument Jun. 24, 2003
6579738 Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials Jun. 17, 2003
6580174 Vented vias for via in pad technology yield improvements Jun. 17, 2003
6580176 Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation Jun. 17, 2003
6577010 Stepped photoresist profile and opening formed using the profile Jun. 10, 2003
6573584 Thin film electronic device and circuit board mounting the same Jun. 3, 2003
6570181 Semiconductor metal interconnect reliability test structure May. 27, 2003
6570258 Method for reducing capacitive coupling between conductive lines May. 27, 2003
6566738 Lead-over-chip leadframes May. 20, 2003
6566888 Repair of resistive electrical connections in an integrated circuit May. 20, 2003
6563221 Connection structures for integrated circuits and processes for their formation May. 13, 2003
6559527 Process for forming cone shaped solder for chip interconnection May. 6, 2003
6559541 Connection structure for semiconductor electrode terminals May. 6, 2003
6555902 Multiple stacked-chip packaging structure Apr. 29, 2003
6555910 Use of small openings in large topography features to improve dielectric thickness control and a method of manufacture thereof Apr. 29, 2003
6555913 Electronic component having a coil conductor with photosensitive conductive paste Apr. 29, 2003
6555914 Integrated circuit package via Apr. 29, 2003
6555915 Integrated circuit having interconnect to a substrate and method therefor Apr. 29, 2003
6555916 Integrated circuit prepared by selectively cleaning copper substrates, in-situ, to remove copper oxides Apr. 29, 2003
6552420 Redundant pinout configuration for signal enhancement in IC packages Apr. 22, 2003
6552435 Integrated circuit with conductive lines disposed within isolation regions Apr. 22, 2003
6548857 Low resistance contact structure for a select transistor of EEPROM memory cells in a NO-DPCC process Apr. 15, 2003
6548902 Semiconductor integrated circuit device, circuit design apparatus, and circuit design method Apr. 15, 2003

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