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Class Information
Number: 257/773
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified configuration
Description: Subject matter in which an electrical contact or lead has a specific configuration or shape.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7002247 |
Thermal interposer for thermal management of semiconductor devices |
Feb. 21, 2006 |
| 6998715 |
Grid array electronic component, wire reinforcing method for the same, and method of manufacturing the same |
Feb. 14, 2006 |
| 6998716 |
Diamond metal-filled patterns achieving low parasitic coupling capacitance |
Feb. 14, 2006 |
| 6992394 |
Multi-level conductive lines with reduced pitch |
Jan. 31, 2006 |
| 6989330 |
Semiconductor device and method of manufacture thereof |
Jan. 24, 2006 |
| 6989602 |
Dual damascene process with no passing metal features |
Jan. 24, 2006 |
| 6989603 |
nF-Opening Aiv Structures |
Jan. 24, 2006 |
| 6987314 |
Stackable semiconductor package with solder on pads on which second semiconductor package is stacked |
Jan. 17, 2006 |
| 6987321 |
Copper diffusion deterrent interface |
Jan. 17, 2006 |
| 6987323 |
Chip-size semiconductor package |
Jan. 17, 2006 |
| 6984890 |
Chip-scale package |
Jan. 10, 2006 |
| 6984892 |
Semiconductor structure implementing low-K dielectric materials and supporting stubs |
Jan. 10, 2006 |
| 6982487 |
Wafer level package and multi-package stack |
Jan. 3, 2006 |
| 6982491 |
Sensor semiconductor package and method of manufacturing the same |
Jan. 3, 2006 |
| 6982494 |
Semiconductor device with signal line having decreased characteristic impedance |
Jan. 3, 2006 |
| 6979393 |
Method for plating copper conductors and devices formed |
Dec. 27, 2005 |
| 6979643 |
Interlayer connections for layered electronic devices |
Dec. 27, 2005 |
| 6979898 |
Semiconductor component and a method of fabricating the semiconductor component |
Dec. 27, 2005 |
| 6979906 |
Solder on a sloped surface |
Dec. 27, 2005 |
| 6977431 |
Stackable semiconductor package and manufacturing method thereof |
Dec. 20, 2005 |
| 6977433 |
Multi function package |
Dec. 20, 2005 |
| 6977441 |
Interconnect substrate and method of manufacture thereof, electronic component and method of manufacturing thereof, circuit board and electronic instrument |
Dec. 20, 2005 |
| 6976200 |
Semiconductor integrated circuit having bonding optional function |
Dec. 13, 2005 |
| 6972488 |
Semiconductor device in which a semiconductor chip mounted on a printed circuit is sealed with a molded resin |
Dec. 6, 2005 |
| 6972493 |
Semiconductor integrated circuit having reduced cross-talk noise |
Dec. 6, 2005 |
| 6969909 |
Flip chip FET device |
Nov. 29, 2005 |
| 6967399 |
Semiconductor device manufacturing method having a step of applying a copper foil on a substrate as a part of a wiring connecting an electrode pad to a mounting terminal |
Nov. 22, 2005 |
| 6967408 |
Gate stack structure |
Nov. 22, 2005 |
| 6963142 |
Flip chip integrated package mount support |
Nov. 8, 2005 |
| 6958527 |
Wiring board having interconnect pattern with land, and semiconductor device, circuit board, and electronic equipment incorporating the same |
Oct. 25, 2005 |
| 6958528 |
Leads under chip IC package |
Oct. 25, 2005 |
| 6958546 |
Method for dual-layer polyimide processing on bumping technology |
Oct. 25, 2005 |
| 6956286 |
Integrated circuit package with overlapping bond fingers |
Oct. 18, 2005 |
| 6953956 |
Semiconductor device having borderless logic array and flexible I/O |
Oct. 11, 2005 |
| 6953987 |
Composite integrated circuit device having restricted heat conduction |
Oct. 11, 2005 |
| 6953995 |
Hermetic chip in wafer form |
Oct. 11, 2005 |
| 6953997 |
Semiconductor device with improved bonding pad connection and placement |
Oct. 11, 2005 |
| 6954001 |
Semiconductor device including a diffusion layer |
Oct. 11, 2005 |
| 6952045 |
Memory device power distribution in electronic systems |
Oct. 4, 2005 |
| 6952053 |
Metal bond pad for integrated circuits allowing improved probing ability of small pads |
Oct. 4, 2005 |
| 6949813 |
Lead-over-chip lead frames |
Sep. 27, 2005 |
| 6949832 |
Semiconductor device including dissimilar element-diffused metal layer and manufacturing method thereof |
Sep. 27, 2005 |
| 6949833 |
Combined atomic layer deposition and damascene processing for definition of narrow trenches |
Sep. 27, 2005 |
| 6949835 |
Semiconductor device |
Sep. 27, 2005 |
| 6949837 |
Bonding pad arrangement method for semiconductor devices |
Sep. 27, 2005 |
| 6949839 |
Aligned buried structures formed by surface transformation of empty spaces in solid state materials |
Sep. 27, 2005 |
| 6946692 |
Interconnection utilizing diagonal routing |
Sep. 20, 2005 |
| 6946727 |
Vertical routing structure |
Sep. 20, 2005 |
| 6946737 |
Robust interlocking via |
Sep. 20, 2005 |
| 6946746 |
Method to reduce number of wire-bond loop heights versus the total quantity of power and signal rings |
Sep. 20, 2005 |
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