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Class Information
Number: 257/768
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified material other than unalloyed aluminum > Refractory or platinum group metal or alloy or silicide thereof
Description: Subject matter wherein the specified contact or lead material is a refractory metal or a platinum group metal, i.e., a metal found in groups IVA, VA, VIA or VIIIA (other than iron (Fe), nickel (Ni) or cobalt (Co)) of the periodic table of the elements or a silicide (i.e., a binary compound of silicon), usually with a more electropositive element or radical, thereof.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 8378490 |
Semiconductor apparatus including a metal alloy between a first contact and a second contact |
Feb. 19, 2013 |
| 8349730 |
Transitional interface between metal and dielectric in interconnect structures |
Jan. 8, 2013 |
| 8344438 |
Electrode of an integrated circuit |
Jan. 1, 2013 |
| 8334574 |
Semiconductor contact structure and method of fabricating the same |
Dec. 18, 2012 |
| 8330234 |
Semiconductor device and manufacturing process therefor |
Dec. 11, 2012 |
| 8247836 |
Nickel tin bonding system with barrier layer for semiconductor wafers and devices |
Aug. 21, 2012 |
| 8248810 |
Electronic device |
Aug. 21, 2012 |
| 8237167 |
Semiconductor device and manufacturing method thereof |
Aug. 7, 2012 |
| 8232647 |
Structure and process for metallization in high aspect ratio features |
Jul. 31, 2012 |
| 8159068 |
Semiconductor device |
Apr. 17, 2012 |
| 8154130 |
Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby |
Apr. 10, 2012 |
| 8129844 |
Method of forming a metal silicide layer, devices incorporating metal silicide layers and design structures for the devices |
Mar. 6, 2012 |
| 8115264 |
Semiconductor device having a metal gate with a low sheet resistance and method of fabricating metal gate of the same |
Feb. 14, 2012 |
| 8114720 |
Semiconductor device and manufacturing method thereof |
Feb. 14, 2012 |
| 8101871 |
Aluminum bond pads with enhanced wire bond stability |
Jan. 24, 2012 |
| 8076781 |
Semiconductor device and manufacturing method of the same |
Dec. 13, 2011 |
| 8072076 |
Bond pad structures and integrated circuit chip having the same |
Dec. 6, 2011 |
| 8044514 |
Semiconductor integrated circuit |
Oct. 25, 2011 |
| 8030777 |
Protection of Cu damascene interconnects by formation of a self-aligned buffer layer |
Oct. 4, 2011 |
| 8022482 |
Device configuration of asymmetrical DMOSFET with schottky barrier source |
Sep. 20, 2011 |
| 8013446 |
Nitrogen-containing metal cap for interconnect structures |
Sep. 6, 2011 |
| 7998858 |
Vertical interconnect structure, memory device and associated production method |
Aug. 16, 2011 |
| 7985668 |
Method for forming a metal silicide having a lower potential for containing material defects |
Jul. 26, 2011 |
| 7960832 |
Integrated circuit arrangement with layer stack |
Jun. 14, 2011 |
| 7955908 |
Thin film transistor array panel and manufacturing method thereof |
Jun. 7, 2011 |
| 7928571 |
Device having dual etch stop liner and reformed silicide layer and related methods |
Apr. 19, 2011 |
| 7915735 |
Selective metal deposition over dielectric layers |
Mar. 29, 2011 |
| 7851916 |
Strain silicon wafer with a crystal orientation (100) in flip chip BGA package |
Dec. 14, 2010 |
| 7847410 |
Interconnect of group III-V semiconductor device and fabrication method for making the same |
Dec. 7, 2010 |
| 7830010 |
Surface treatment for selective metal cap applications |
Nov. 9, 2010 |
| 7825516 |
Formation of aligned capped metal lines and interconnections in multilevel semiconductor structures |
Nov. 2, 2010 |
| 7807538 |
Method of forming a silicide layer while applying a compressive or tensile strain to impurity layers |
Oct. 5, 2010 |
| 7807571 |
Semiconductor device and methods of forming the same |
Oct. 5, 2010 |
| 7799682 |
Transistor having a locally provided metal silicide region in contact areas and a method of forming the transistor |
Sep. 21, 2010 |
| 7786837 |
Semiconductor power device having a stacked discrete inductor structure |
Aug. 31, 2010 |
| 7777344 |
Transitional interface between metal and dielectric in interconnect structures |
Aug. 17, 2010 |
| 7750471 |
Metal and alloy silicides on a single silicon wafer |
Jul. 6, 2010 |
| 7732331 |
Copper interconnect structure having stuffed diffusion barrier |
Jun. 8, 2010 |
| 7719044 |
Platinum-containing integrated circuits and capacitor constructions |
May. 18, 2010 |
| 7692301 |
Stitched micro-via to enhance adhesion and mechanical strength |
Apr. 6, 2010 |
| 7655567 |
Methods for improving uniformity and resistivity of thin tungsten films |
Feb. 2, 2010 |
| 7649263 |
Semiconductor device |
Jan. 19, 2010 |
| 7638800 |
Wire for a display device, a method for manufacturing the same, a thin film transistor array panel including the wire, and a method for manufacturing the same |
Dec. 29, 2009 |
| 7629254 |
Semiconductor device |
Dec. 8, 2009 |
| 7615868 |
Electrode, method for producing same and semiconductor device using same |
Nov. 10, 2009 |
| 7586196 |
Apparatus for an improved air gap interconnect structure |
Sep. 8, 2009 |
| 7541284 |
Method of depositing Ru films having high density |
Jun. 2, 2009 |
| 7494607 |
Electroconductive thick film composition(s), electrode(s), and semiconductor device(s) formed therefrom |
Feb. 24, 2009 |
| 7479682 |
Structure of a field effect transistor having metallic silicide and manufacturing method thereof |
Jan. 20, 2009 |
| 7479687 |
Deep via seed repair using electroless plating chemistry |
Jan. 20, 2009 |
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