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Class Information
Number: 257/758
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified material other than unalloyed aluminum > Layered > Multiple metal levels on semiconductor, separated by insulating layer (e.g., multiple level metallization for integrated circuit)
Description: Subject matter wherein there are plural layers of metal forming electrical contact material, the layers being separated by intervening layers of insulator material.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7619310 |
Semiconductor interconnect and method of making same |
Nov. 17, 2009 |
| 7619309 |
Integrated connection arrangements |
Nov. 17, 2009 |
| 7619297 |
Electronic device including an inductor |
Nov. 17, 2009 |
| 7619264 |
Semiconductor device |
Nov. 17, 2009 |
| 7618890 |
Methods for forming conductive structures and structures regarding same |
Nov. 17, 2009 |
| 7617598 |
Method of making a thermally isolated via structure |
Nov. 17, 2009 |
| 7615848 |
Semiconductor device and a method of manufacturing the same |
Nov. 10, 2009 |
| 7615819 |
Semiconductor device |
Nov. 10, 2009 |
| 7612453 |
Semiconductor device having an interconnect structure and a reinforcing insulating film |
Nov. 3, 2009 |
| 7608928 |
Laminated body and semiconductor device |
Oct. 27, 2009 |
| 7608927 |
Localized biasing for silicon on insulator structures |
Oct. 27, 2009 |
| 7605471 |
Semiconductor devices and methods for manufacturing the same |
Oct. 20, 2009 |
| 7605470 |
Dummy patterns and method of manufacture for mechanical strength of low K dielectric materials in copper interconnect structures for semiconductor devices |
Oct. 20, 2009 |
| 7605464 |
Semiconductor device |
Oct. 20, 2009 |
| 7605414 |
MOS transistors having low-resistance salicide gates and a self-aligned contact between them |
Oct. 20, 2009 |
| 7602065 |
Seal ring in semiconductor device |
Oct. 13, 2009 |
| 7602064 |
Semiconductor device having an inspection hole striding a boundary |
Oct. 13, 2009 |
| 7601998 |
Semiconductor memory device having metallization comprising select lines, bit lines and word lines |
Oct. 13, 2009 |
| 7601631 |
Very low dielectric constant plasma-enhanced CVD films |
Oct. 13, 2009 |
| 7601629 |
Semiconductive device fabricated using subliming materials to form interlevel dielectrics |
Oct. 13, 2009 |
| 7598616 |
Interconnect structure |
Oct. 6, 2009 |
| 7598615 |
Analytic structure for failure analysis of semiconductor device having a multi-stacked interconnection structure |
Oct. 6, 2009 |
| 7595555 |
Method of forming air gaps in a dielectric material using a sacrificial film and resulting structures |
Sep. 29, 2009 |
| 7595554 |
Interconnect structure with dielectric air gaps |
Sep. 29, 2009 |
| 7592710 |
Bond pad structure for wire bonding |
Sep. 22, 2009 |
| 7592248 |
Method of forming semiconductor device having nanotube structures |
Sep. 22, 2009 |
| 7592247 |
Sub-lithographic local interconnects, and methods for forming same |
Sep. 22, 2009 |
| 7589424 |
Thin silicon based substrate |
Sep. 15, 2009 |
| 7589423 |
Semiconductor device and a method of manufacturing the same and designing the same |
Sep. 15, 2009 |
| 7589398 |
Embedded metal features structure |
Sep. 15, 2009 |
| 7589011 |
Semiconductor device and method of forming intermetal dielectric layer |
Sep. 15, 2009 |
| 7586196 |
Apparatus for an improved air gap interconnect structure |
Sep. 8, 2009 |
| 7586195 |
Semiconductor device |
Sep. 8, 2009 |
| 7586176 |
Semiconductor device with crack prevention ring |
Sep. 8, 2009 |
| 7586143 |
Semiconductor device |
Sep. 8, 2009 |
| 7586132 |
Power FET with low on-resistance using merged metal layers |
Sep. 8, 2009 |
| 7585754 |
Method of forming bonding pad opening |
Sep. 8, 2009 |
| 7582970 |
Carbon containing silicon oxide film having high ashing tolerance and adhesion |
Sep. 1, 2009 |
| 7582969 |
Hermetic interconnect structure and method of manufacture |
Sep. 1, 2009 |
| 7579696 |
Semiconductor device |
Aug. 25, 2009 |
| 7573142 |
Alignment key structure in a semiconductor device and method of forming the same |
Aug. 11, 2009 |
| 7573135 |
Electronic parts packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film |
Aug. 11, 2009 |
| 7573133 |
Interconnect structures and methods for their fabrication |
Aug. 11, 2009 |
| 7572734 |
Etch depth control for dual damascene fabrication process |
Aug. 11, 2009 |
| 7572728 |
Semiconductor device and method for manufacturing the same |
Aug. 11, 2009 |
| 7569936 |
Semiconductor device and method of manufacturing the same |
Aug. 4, 2009 |
| 7569908 |
Semiconductor device and method of manufacturing the same |
Aug. 4, 2009 |
| 7569476 |
Semiconductor integrated circuit device and a method of manufacturing the same |
Aug. 4, 2009 |
| 7566971 |
Semiconductor device and manufacturing method thereof |
Jul. 28, 2009 |
| 7564135 |
Semiconductor device having self-aligned contact and method of fabricating the same |
Jul. 21, 2009 |
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