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Class Information
Number: 257/750
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Combined with electrical contact or lead > Of specified material other than unalloyed aluminum > Layered
Description: Subject matter wherein the specified contact material is layered.
Sub-classes under this class:
| Class Number |
Class Name |
Patents |
| 257/766 |
At least one layer containing chromium or nickel |
423 |
| 257/762 |
At least one layer containing silver or copper |
1,188 |
| 257/761 |
At least one layer containing vanadium, hafnium, niobium, zirconium, or tantalum |
366 |
| 257/751 |
At least one layer forms a diffusion barrier |
1,655 |
| 257/765 |
At least one layer of an alloy containing aluminum |
501 |
| 257/763 |
At least one layer of molybdenum, titanium, or tungsten |
980 |
| 257/754 |
At least one layer of silicide or polycrystalline silicon |
607 |
| 257/758 |
Multiple metal levels on semiconductor, separated by insulating layer (e.g., multiple level metallization for integrated circuit) |
3,974 |
| 257/752 |
Planarized to top of insulating layer |
559 |
| 257/753 |
With adhesion promoting means (e.g., layer of material) to promote adhesion of contact to an insulating layer |
479 |
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 8710663 |
Method of manufacturing semiconductor device and semiconductor device |
Apr. 29, 2014 |
| 8704372 |
Integrated circuits and methods for processing integrated circuits with embedded features |
Apr. 22, 2014 |
| 8692372 |
Semiconductor device having impurity doped polycrystalline layer including impurity diffusion prevention layer and dynamic random memory device including the semiconductor device |
Apr. 8, 2014 |
| 8692371 |
Semiconductor apparatus and manufacturing method thereof |
Apr. 8, 2014 |
| 8686562 |
Refractory metal nitride capped electrical contact and method for frabricating same |
Apr. 1, 2014 |
| 8673772 |
Biosensor chip and a method of manufacturing the same |
Mar. 18, 2014 |
| 8648464 |
Semiconductor device and manufacturing method thereof |
Feb. 11, 2014 |
| 8643151 |
Passivation layer for semiconductor devices |
Feb. 4, 2014 |
| 8643147 |
Seal ring structure with improved cracking protection and reduced problems |
Feb. 4, 2014 |
| 8633593 |
Semiconductor device |
Jan. 21, 2014 |
| 8629561 |
Air gap-containing interconnect structure having photo-patternable low k material |
Jan. 14, 2014 |
| 8604625 |
Semiconductor device having conductive pads to prevent solder reflow |
Dec. 10, 2013 |
| 8604616 |
Semiconductor chip including a chip via plug penetrating a substrate, a semiconductor stack, a semiconductor device package and an electronic apparatus including the semiconductor chip |
Dec. 10, 2013 |
| 8598705 |
Composite substrate for a semiconductor chip |
Dec. 3, 2013 |
| 8598704 |
Semiconductor device |
Dec. 3, 2013 |
| 8598703 |
Semiconductor device |
Dec. 3, 2013 |
| 8592985 |
Methods of forming conductive structures and methods of forming DRAM cells |
Nov. 26, 2013 |
| 8587112 |
Underbump metallurgy employing an electrolytic Cu / electorlytic Ni / electrolytic Cu stack |
Nov. 19, 2013 |
| 8581404 |
Structure of gold bumps and gold conductors on one IC die and methods of manufacturing the structures |
Nov. 12, 2013 |
| 8575751 |
Conductive bump, method for producing the same, and electronic component mounted structure |
Nov. 5, 2013 |
| 8569887 |
Post passivation interconnect with oxidation prevention layer |
Oct. 29, 2013 |
| 8564131 |
Semiconductor device and method for manufacturing the same |
Oct. 22, 2013 |
| 8558381 |
Semiconductor device |
Oct. 15, 2013 |
| 8552559 |
Very thick metal interconnection scheme in IC chips |
Oct. 8, 2013 |
| 8546947 |
Chip structure and process for forming the same |
Oct. 1, 2013 |
| 8541882 |
Stacked IC device with recessed conductive layers adjacent to interlevel conductors |
Sep. 24, 2013 |
| 8536708 |
Method of manufacturing a semiconductor device and semiconductor device |
Sep. 17, 2013 |
| 8536703 |
Semiconductor devices and electronic systems |
Sep. 17, 2013 |
| 8525339 |
Hybrid copper interconnect structure and method of fabricating same |
Sep. 3, 2013 |
| 8524596 |
Techniques for improving bond pad performance |
Sep. 3, 2013 |
| 8513808 |
Semiconductor device having trench-isolated element formation region |
Aug. 20, 2013 |
| 8513805 |
Manufacturing of a semiconductor device and the manufacturing method |
Aug. 20, 2013 |
| 8507379 |
Semiconductor device and manufacturing method thereof |
Aug. 13, 2013 |
| 8492893 |
Semiconductor device capable of preventing dielectric layer from cracking |
Jul. 23, 2013 |
| 8487439 |
Laminated and sintered ceramic circuit board, and semiconductor package including the circuit board |
Jul. 16, 2013 |
| 8487437 |
Electronic device package and method for fabricating the same |
Jul. 16, 2013 |
| 8487304 |
High performance compliant wafer test probe |
Jul. 16, 2013 |
| 8482126 |
Semiconductor device |
Jul. 9, 2013 |
| 8476764 |
Bonding pad structure for semiconductor devices |
Jul. 2, 2013 |
| 8476759 |
Electrical connection structure |
Jul. 2, 2013 |
| 8461685 |
Substrate comprising a plurality of integrated circuitry die, and a substrate |
Jun. 11, 2013 |
| 8461681 |
Layered structure for corrosion resistant interconnect contacts |
Jun. 11, 2013 |
| 8460996 |
Semiconductor devices with different dielectric thicknesses |
Jun. 11, 2013 |
| 8456006 |
Hybrid interconnect structure for performance improvement and reliability enhancement |
Jun. 4, 2013 |
| 8450204 |
Structure and process for metallization in high aspect ratio features |
May. 28, 2013 |
| 8445382 |
Side wall pore sealing for low-k dielectrics |
May. 21, 2013 |
| 8445321 |
Semiconductor device and method of manufacturing the same |
May. 21, 2013 |
| 8441130 |
Power supply interconnect structure of semiconductor integrated circuit |
May. 14, 2013 |
| 8436482 |
Semiconductor device, and method of fabricating semiconductor device |
May. 7, 2013 |
| 8432045 |
Conductive pads defined by embedded traces |
Apr. 30, 2013 |
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