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Class Information
Number: 257/697
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Housing or package > With contact or lead > With particular lead geometry > External connection to housing > Pin grid type
Description: Subject matter wherein the leads or contacts which form an external connection to the housing or package are in the form of a grid or matrix of elongated pins.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7449772 |
Chip-type electronic component including thin-film circuit elements |
Nov. 11, 2008 |
| 7436052 |
Repatterned integrated circuit chip package |
Oct. 14, 2008 |
| 7372169 |
Arrangement of conductive pads on grid array package and on circuit board |
May. 13, 2008 |
| 7371687 |
Electronic circuit device |
May. 13, 2008 |
| 7365419 |
Surface-mount packaging for chip |
Apr. 29, 2008 |
| 7358603 |
High density electronic packages |
Apr. 15, 2008 |
| 7348661 |
Array capacitor apparatuses to filter input/output signal |
Mar. 25, 2008 |
| 7339259 |
Semiconductor device |
Mar. 4, 2008 |
| 7323776 |
Elevated heat dissipating device |
Jan. 29, 2008 |
| 7323775 |
Memory module |
Jan. 29, 2008 |
| 7319269 |
Semiconductor device power interconnect striping |
Jan. 15, 2008 |
| 7309916 |
Semiconductor package and method for its manufacture |
Dec. 18, 2007 |
| 7301234 |
Stack type semiconductor package module utilizing solder coated stacking protrusions and method for manufacturing the same |
Nov. 27, 2007 |
| 7297563 |
Method of making contact pin card system |
Nov. 20, 2007 |
| 7277274 |
Keypad of portable wireless terminal and fabrication method thereof |
Oct. 2, 2007 |
| 7271047 |
Test structure and method for measuring the resistance of line-end vias |
Sep. 18, 2007 |
| 7259453 |
Hexagonal array structure for ball grid array packages |
Aug. 21, 2007 |
| 7242083 |
Substrate for IC package |
Jul. 10, 2007 |
| 7239024 |
Semiconductor package with recess for die |
Jul. 3, 2007 |
| 7235872 |
Bow control in an electronic package |
Jun. 26, 2007 |
| 7215030 |
Lead-free semiconductor package |
May. 8, 2007 |
| 7211886 |
Three-dimensional multichip stack electronic package structure |
May. 1, 2007 |
| 7211888 |
Encapsulation of pin solder for maintaining accuracy in pin position |
May. 1, 2007 |
| 7193305 |
Memory card ESC substrate insert |
Mar. 20, 2007 |
| 7183644 |
Integrated circuit package with improved power signal connection |
Feb. 27, 2007 |
| 7161251 |
Partially populated ball grid design to accommodate landing pads close to the die |
Jan. 9, 2007 |
| 7161236 |
Bow control in an electronic package |
Jan. 9, 2007 |
| 7129562 |
Dual-height cell with variable width power rail architecture |
Oct. 31, 2006 |
| 7119448 |
Main power inductance based on bond wires for a switching power converter |
Oct. 10, 2006 |
| 7102230 |
Circuit carrier and fabrication method thereof |
Sep. 5, 2006 |
| 7095107 |
Ball assignment schemes for integrated circuit packages |
Aug. 22, 2006 |
| 7079390 |
System and method for heat dissipation and air flow redirection in a chassis |
Jul. 18, 2006 |
| 7064421 |
Wire bonding package |
Jun. 20, 2006 |
| 7045443 |
Method for manufacturing semiconductor device, semiconductor device, circuit board, and electronic apparatus |
May. 16, 2006 |
| 7023076 |
Multiple chip semiconductor packages |
Apr. 4, 2006 |
| 7005753 |
Optimization of routing layers and board space requirements for a ball grid array land pattern |
Feb. 28, 2006 |
| 7005736 |
Semiconductor device power interconnect striping |
Feb. 28, 2006 |
| 7002244 |
Semiconductor device |
Feb. 21, 2006 |
| 6989591 |
Method for making an integrated circuit of the surface-mount type and resulting circuit |
Jan. 24, 2006 |
| 6974765 |
Encapsulation of pin solder for maintaining accuracy in pin position |
Dec. 13, 2005 |
| 6960837 |
Method of connecting core I/O pins to backside chip I/O pads |
Nov. 1, 2005 |
| 6956285 |
EMI grounding pins for CPU/ASIC chips |
Oct. 18, 2005 |
| 6953892 |
Connection housing for an electronic component |
Oct. 11, 2005 |
| 6949823 |
Method and apparatus for high electrical and thermal performance ball grid array package |
Sep. 27, 2005 |
| 6946725 |
Electronic device having microscopically small contact areas and methods for producing the electronic device |
Sep. 20, 2005 |
| 6946726 |
Chip carrier substrate with a land grid array and external bond terminals |
Sep. 20, 2005 |
| 6933602 |
Semiconductor package having a thermally and electrically connected heatspreader |
Aug. 23, 2005 |
| 6922344 |
Device for connecting the terminal pins of a package for an optical transmitting and/or receiving device to a printed circuit board and conductor arrangement for such a device |
Jul. 26, 2005 |
| 6914326 |
Solder ball landpad design to improve laminate performance |
Jul. 5, 2005 |
| 6911726 |
Microelectronic packaging and methods for thermally protecting package interconnects and components |
Jun. 28, 2005 |
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