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Class Information
Number: 257/652
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > With means to control surface effects > Channel stop layer
Description: Subject matter wherein the means to control surface effects comprises a channel stop region (i.e., a region of heavy doping concentration in the underlying semiconductor surface to prevent inversion of the surface by formation of a layer of induced minority carriers).
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7220994 |
In plane switching mode liquid crystal display device |
May. 22, 2007 |
| 7151306 |
Electronic part, and electronic part mounting element and an process for manufacturing such the articles |
Dec. 19, 2006 |
| 7042049 |
Composite etching stop in semiconductor process integration |
May. 9, 2006 |
| 6953961 |
DRAM structure and fabricating method thereof |
Oct. 11, 2005 |
| 6924228 |
Method of forming a via contact structure using a dual damascene technique |
Aug. 2, 2005 |
| 6914320 |
Bilayer HDP CVD/PE CVD cap in advanced BEOL interconnect structures and method thereof |
Jul. 5, 2005 |
| 6887783 |
Bilayer HDP CVD/PE CVD cap in advance BEOL interconnect structures and method thereof |
May. 3, 2005 |
| 6667553 |
H:SiOC coated substrates |
Dec. 23, 2003 |
| 6593655 |
Method for producing hydrogenated silicon oxycarbide films having low dielectric constant |
Jul. 15, 2003 |
| 6563197 |
MOSgated device termination with guard rings under field plate |
May. 13, 2003 |
| 6518635 |
Semiconductor device and manufacturing method thereof |
Feb. 11, 2003 |
| 6501155 |
Semiconductor apparatus and process for manufacturing the same |
Dec. 31, 2002 |
| 6465867 |
Amorphous and gradated barrier layer for integrated circuit interconnects |
Oct. 15, 2002 |
| 6452285 |
Fabrication of standard defects in contacts |
Sep. 17, 2002 |
| 6333548 |
Semiconductor device with etch stopping film |
Dec. 25, 2001 |
| 6215167 |
Power semiconductor device employing field plate and manufacturing method thereof |
Apr. 10, 2001 |
| 6211541 |
Article for de-embedding parasitics in integrated circuits |
Apr. 3, 2001 |
| 6194750 |
Integrated circuit comprising means for high frequency signal transmission |
Feb. 27, 2001 |
| 6153920 |
Process for controlling dopant diffusion in a semiconductor layer and semiconductor device formed thereby |
Nov. 28, 2000 |
| 6084263 |
Power device having high breakdown voltage and method of manufacturing the same |
Jul. 4, 2000 |
| 6064110 |
Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
May. 16, 2000 |
| 6054752 |
Semiconductor device |
Apr. 25, 2000 |
| 5726469 |
Surface voltage sustaining structure for semiconductor devices |
Mar. 10, 1998 |
| 5712492 |
Transistor for checking radiation-hardened transistor |
Jan. 27, 1998 |
| 5641982 |
High voltage mosfet with an improved channel stopper structure |
Jun. 24, 1997 |
| 5631496 |
Semiconductor component having a passivation layer and method for manufacturing same |
May. 20, 1997 |
| 5541435 |
Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps |
Jul. 30, 1996 |
| 5508555 |
Thin film field effect transistor having a doped sub-channel region |
Apr. 16, 1996 |
| 5483096 |
Photo sensor |
Jan. 9, 1996 |
| 5350942 |
Low resistance silicided substrate contact |
Sep. 27, 1994 |
| 5311052 |
Planar semiconductor component with stepped channel stopper electrode |
May. 10, 1994 |
| 5298770 |
Power switching MOS transistor |
Mar. 29, 1994 |
| 5298789 |
Semiconductor component for a high blocking bias |
Mar. 29, 1994 |
| 5262672 |
Apparatus for improvement of interconnection capacitance |
Nov. 16, 1993 |
| 5192993 |
Semiconductor device having improved element isolation area |
Mar. 9, 1993 |
| 5159428 |
Sidewall-sealed poly-buffered LOCOS isolation |
Oct. 27, 1992 |
| 5107320 |
Method and apparatus for improvement of interconnection capacitance |
Apr. 21, 1992 |
| 5049964 |
Bipolar transistor and method of manufacturing the same |
Sep. 17, 1991 |
| 4972242 |
Silicon avalanche photodiode with low multiplication noise |
Nov. 20, 1990 |
| 4816882 |
Power MOS transistor with equipotential ring |
Mar. 28, 1989 |
| 4753896 |
Sidewall channel stop process |
Jun. 28, 1988 |
| 4729964 |
Method of forming twin doped regions of the same depth by high energy implant |
Mar. 8, 1988 |
| 4717683 |
CMOS process |
Jan. 5, 1988 |
| 4691224 |
Planar semiconductor device with dual conductivity insulating layers over guard rings |
Sep. 1, 1987 |
| 4666556 |
Trench sidewall isolation by polysilicon oxidation |
May. 19, 1987 |
| 4618875 |
Darlington transistor circuit |
Oct. 21, 1986 |
| 4613885 |
High-voltage CMOS process |
Sep. 23, 1986 |
| 4573257 |
Method of forming self-aligned implanted channel-stop and buried layer utilizing non-single crystal alignment key |
Mar. 4, 1986 |
| 4496963 |
Semiconductor device with an ion implanted stabilization layer |
Jan. 29, 1985 |
| 4485393 |
Semiconductor device with selective nitride layer over channel stop |
Nov. 27, 1984 |
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