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Class Information
Number: 257/649
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > With means to control surface effects > Insulating coating > Insulating layer of silicon nitride or silicon oxynitride
Description: Subject matter wherein the insulating layer is composed of silicon nitride or of a mixture of silicon oxide and silicon nitride.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7615457 |
Method of fabricating self-aligned bipolar transistor having tapered collector |
Nov. 10, 2009 |
| 7550823 |
Nonvolatile memory cell, array thereof, fabrication methods thereof and device comprising the same |
Jun. 23, 2009 |
| 7544983 |
MTJ read head with sidewall spacers |
Jun. 9, 2009 |
| 7518193 |
SRAM array and analog FET with dual-strain layers comprising relaxed regions |
Apr. 14, 2009 |
| 7518246 |
Atomic layer deposition of CeO.sub.2/Al.sub.2O.sub.3 films as gate dielectrics |
Apr. 14, 2009 |
| 7511381 |
Thin film transistor and method of manufacturing the same |
Mar. 31, 2009 |
| 7511360 |
Semiconductor device having stressors and method for forming |
Mar. 31, 2009 |
| 7508053 |
Semiconductor MOS transistor device and method for making the same |
Mar. 24, 2009 |
| 7492014 |
Semiconductor device |
Feb. 17, 2009 |
| 7482677 |
Dielectric structures having high dielectric constants, and non-volatile semiconductor memory devices having the dielectric structures |
Jan. 27, 2009 |
| 7470976 |
Organic electroluminescent device, manufacturing method therefor, and electronic devices therewith |
Dec. 30, 2008 |
| 7446394 |
Semiconductor device fabricated by selective epitaxial growth method |
Nov. 4, 2008 |
| 7446395 |
Device having dual etch stop liner and protective layer |
Nov. 4, 2008 |
| 7432216 |
Semiconductor device and manufacturing method thereof |
Oct. 7, 2008 |
| 7423330 |
Semiconductor device with strain |
Sep. 9, 2008 |
| 7414290 |
Double gate transistor, method of manufacturing same, and system containing same |
Aug. 19, 2008 |
| 7400031 |
Asymmetrically stressed CMOS FinFET |
Jul. 15, 2008 |
| 7397073 |
Barrier dielectric stack for seam protection |
Jul. 8, 2008 |
| 7388278 |
High performance field effect transistors on SOI substrate with stress-inducing material as buried insulator and methods |
Jun. 17, 2008 |
| 7372107 |
SOI chip with recess-resistant buried insulator and method of manufacturing the same |
May. 13, 2008 |
| 7358595 |
Method for manufacturing MOS transistor |
Apr. 15, 2008 |
| 7301219 |
Electrically erasable programmable read only memory (EEPROM) cell and method for making the same |
Nov. 27, 2007 |
| 7300891 |
Method and system for increasing tensile stress in a thin film using multi-frequency electromagnetic radiation |
Nov. 27, 2007 |
| 7265066 |
Method and system for increasing tensile stress in a thin film using collimated electromagnetic radiation |
Sep. 4, 2007 |
| 7179749 |
Method for fabricating semiconductor device capable of decreasing critical dimension in peripheral region |
Feb. 20, 2007 |
| 7166891 |
Semiconductor device with etch resistant electrical insulation layer between gate electrode and source electrode |
Jan. 23, 2007 |
| 7122878 |
Method to fabricate high reliable metal capacitor within copper back-end process |
Oct. 17, 2006 |
| 7115974 |
Silicon oxycarbide and silicon carbonitride based materials for MOS devices |
Oct. 3, 2006 |
| 7112849 |
Method of preventing semiconductor layers from bending and semiconductor device formed thereby |
Sep. 26, 2006 |
| 7109559 |
Nitrided ultra thin gate dielectrics |
Sep. 19, 2006 |
| 7109557 |
Sacrificial dielectric planarization layer |
Sep. 19, 2006 |
| 7105895 |
Epitaxial SiO.sub.x barrier/insulation layer |
Sep. 12, 2006 |
| 7095095 |
Semiconductor constructions |
Aug. 22, 2006 |
| 7084508 |
Semiconductor device with multiple layer insulating film |
Aug. 1, 2006 |
| 7078815 |
Semiconductor integrated circuit device |
Jul. 18, 2006 |
| 7071538 |
One stack with steam oxide for charge retention |
Jul. 4, 2006 |
| 7061076 |
Solderless component packaging and mounting |
Jun. 13, 2006 |
| 7057262 |
High reflector tunable stress coating, such as for a MEMS mirror |
Jun. 6, 2006 |
| 7042049 |
Composite etching stop in semiconductor process integration |
May. 9, 2006 |
| 7038291 |
Semiconductor device and method of fabricating the same |
May. 2, 2006 |
| 7038304 |
Semiconductor memory device and manufacturing method thereof |
May. 2, 2006 |
| 7023064 |
Temperature stable metal nitride gate electrode |
Apr. 4, 2006 |
| 7019385 |
Semiconductor device and method of fabricating same |
Mar. 28, 2006 |
| 7009226 |
In-situ nitride/oxynitride processing with reduced deposition surface pattern sensitivity |
Mar. 7, 2006 |
| 7005724 |
Semiconductor device and a method of manufacture therefor |
Feb. 28, 2006 |
| 6992370 |
Memory cell structure having nitride layer with reduced charge loss and method for fabricating same |
Jan. 31, 2006 |
| 6978434 |
Method of designing wiring structure of semiconductor device and wiring structure designed accordingly |
Dec. 20, 2005 |
| 6977407 |
Even nucleation between silicon and oxide surfaces for thin silicon nitride film growth |
Dec. 20, 2005 |
| 6974989 |
Structure and method for protecting memory cells from UV radiation damage and UV radiation-induced charging during backend processing |
Dec. 13, 2005 |
| 6960794 |
Formation of thin channels for TFT devices to ensure low variability of threshold voltages |
Nov. 1, 2005 |
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