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Class Information
Number: 257/648
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > With means to control surface effects > Insulating coating > Insulating layer recessed into semiconductor surface (e.g., locos oxide) > Combined with channel stop region in semiconductor
Description: Subject matter wherein the recessed insulating layer is combined with a channel stop region, i.e., a region of heavy doping concentration in the underlying semiconductor surface to prevent inversion of the surface by formation of a layer of induced minority carriers.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7414823 |
Holder for use in semiconductor or liquid-crystal manufacturing device and semiconductor or liquid-crystal manufacturing device in which the holder is installed |
Aug. 19, 2008 |
| 7271468 |
High-voltage compatible, full-depleted CCD |
Sep. 18, 2007 |
| 7227254 |
Integrated circuit package |
Jun. 5, 2007 |
| 7163903 |
Method for making a semiconductor structure using silicon germanium |
Jan. 16, 2007 |
| 7038313 |
Semiconductor device and method of manufacturing the same |
May. 2, 2006 |
| 6953961 |
DRAM structure and fabricating method thereof |
Oct. 11, 2005 |
| 6894354 |
Trench isolated transistors, trench isolation structures, memory cells, and DRAMs |
May. 17, 2005 |
| 6770917 |
High-voltage diode |
Aug. 3, 2004 |
| 6639279 |
Semiconductor transistor having interface layer between semiconductor and insulating layers |
Oct. 28, 2003 |
| 6600524 |
Active matrix type liquid crystal display apparatus with silicon oxide at different portions |
Jul. 29, 2003 |
| 6518635 |
Semiconductor device and manufacturing method thereof |
Feb. 11, 2003 |
| 6501155 |
Semiconductor apparatus and process for manufacturing the same |
Dec. 31, 2002 |
| 6469329 |
Solid state image sensing device and method of producing the same |
Oct. 22, 2002 |
| 6373121 |
Silicon chip built-in inductor structure |
Apr. 16, 2002 |
| 6323539 |
High voltage integrated circuit, high voltage junction terminating structure, and high voltage MIS transistor |
Nov. 27, 2001 |
| 6320245 |
Radiation-hardened semiconductor device |
Nov. 20, 2001 |
| 6285073 |
Contact structure and method of formation |
Sep. 4, 2001 |
| 6249036 |
Stepper alignment mark formation with dual field oxide process |
Jun. 19, 2001 |
| 6242782 |
Circuit for providing isolation of integrated circuit active areas |
Jun. 5, 2001 |
| 6229202 |
Semiconductor package having downset leadframe for reducing package bow |
May. 8, 2001 |
| 6127708 |
Semiconductor device having an intervening region between channel stopper and diffusion region |
Oct. 3, 2000 |
| 6124628 |
High voltage integrated circuit, high voltage junction terminating structure, and high voltage MIS transistor |
Sep. 26, 2000 |
| 6091133 |
Assembly of a semiconductor device and paddleless lead frame having tape extending between the lead fingers |
Jul. 18, 2000 |
| 6046483 |
Planar isolation structure in an integrated circuit |
Apr. 4, 2000 |
| 6034410 |
MOSFET structure with planar surface |
Mar. 7, 2000 |
| 5973375 |
Camouflaged circuit structure with step implants |
Oct. 26, 1999 |
| 5874769 |
Mosfet isolation structure with planar surface |
Feb. 23, 1999 |
| 5841169 |
Integrated circuit containing devices dielectrically isolated and junction isolated from a substrate |
Nov. 24, 1998 |
| 5804884 |
Surface electrical field delimiting structure for an integrated circuit |
Sep. 8, 1998 |
| 5729049 |
Tape under frame for conventional-type IC package assembly |
Mar. 17, 1998 |
| 5696400 |
MOS-type semiconductor integrated circuit device |
Dec. 9, 1997 |
| 5693976 |
MOSFET device having denuded zones for forming alignment marks |
Dec. 2, 1997 |
| 5545907 |
Semiconductor device and method of forming the same |
Aug. 13, 1996 |
| 5541435 |
Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps |
Jul. 30, 1996 |
| 5483096 |
Photo sensor |
Jan. 9, 1996 |
| 5401998 |
Trench isolation using doped sidewalls |
Mar. 28, 1995 |
| 5373177 |
Semiconductor device with improved electric charge storage characteristics |
Dec. 13, 1994 |
| 5365082 |
MOSFET cell array |
Nov. 15, 1994 |
| 5350942 |
Low resistance silicided substrate contact |
Sep. 27, 1994 |
| 5350941 |
Trench isolation structure having a trench formed in a LOCOS structure and a channel stop region on the sidewalls of the trench |
Sep. 27, 1994 |
| H1287 |
Ion implanted diamond metal-insulator-semiconductor field effect transistor |
Feb. 1, 1994 |
| 5262672 |
Apparatus for improvement of interconnection capacitance |
Nov. 16, 1993 |
| 5220192 |
Radiation hardened CMOS structure using an implanted P guard structure and method for the manufacture thereof |
Jun. 15, 1993 |
| 5172198 |
MOS type semiconductor device |
Dec. 15, 1992 |
| 5168334 |
Non-volatile semiconductor memory |
Dec. 1, 1992 |
| 5107320 |
Method and apparatus for improvement of interconnection capacitance |
Apr. 21, 1992 |
| 5081517 |
Mixed technology integrated circuit comprising CMOS structures and efficient lateral bipolar transistors with a high early voltage and fabrication thereof |
Jan. 14, 1992 |
| 5073813 |
Semiconductor device having buried element isolation region |
Dec. 17, 1991 |
| 5038193 |
Semiconductor integrated circuit device |
Aug. 6, 1991 |
| 4984055 |
Semiconductor device having a plurality of conductive layers and manufacturing method therefor |
Jan. 8, 1991 |
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