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Class Information
Number: 257/640
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > With means to control surface effects > Insulating coating > Multiple layers > At least one layer of silicon nitride
Description: Subject matter wherein there is at least one layer of silicon nitride in the multiple insulating layers on the semiconductor body.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 4471525 |
Method for manufacturing semiconductor device utilizing two-step etch and selective oxidation to form isolation regions |
Sep. 18, 1984 |
| 4468857 |
Method of manufacturing an integrated circuit device |
Sep. 4, 1984 |
| 4466172 |
Method for fabricating MOS device with self-aligned contacts |
Aug. 21, 1984 |
| 4464701 |
Process for making high dielectric constant nitride based materials and devices using the same |
Aug. 7, 1984 |
| 4462847 |
Fabrication of dielectrically isolated microelectronic semiconductor circuits utilizing selective growth by low pressure vapor deposition |
Jul. 31, 1984 |
| 4455737 |
Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines |
Jun. 26, 1984 |
| 4435446 |
Edge seal with polysilicon in LOCOS process |
Mar. 6, 1984 |
| 4430663 |
Prevention of surface channels in silicon semiconductor devices |
Feb. 7, 1984 |
| 4424621 |
Method to fabricate stud structure for self-aligned metallization |
Jan. 10, 1984 |
| 4423547 |
Method for forming dense multilevel interconnection metallurgy for semiconductor devices |
Jan. 3, 1984 |
| 4413272 |
Semiconductor devices having fuses |
Nov. 1, 1983 |
| 4402126 |
Method for fabrication of a non-volatile JRAM cell |
Sep. 6, 1983 |
| 4396460 |
Method of forming groove isolation in a semiconductor device |
Aug. 2, 1983 |
| 4381595 |
Process for preparing multilayer interconnection |
May. 3, 1983 |
| 4378630 |
Process for fabricating a high performance PNP and NPN structure |
Apr. 5, 1983 |
| 4368085 |
SOS island edge passivation structure |
Jan. 11, 1983 |
| 4337115 |
Method of forming electrodes on the surface of a semiconductor substrate |
Jun. 29, 1982 |
| 4323986 |
Electronic storage array having DC stable conductivity modulated storage cells |
Apr. 6, 1982 |
| 4313782 |
Method of manufacturing submicron channel transistors |
Feb. 2, 1982 |
| 4283439 |
Method of manufacturing a semiconductor device by forming a tungsten silicide or molybdenum silicide electrode |
Aug. 11, 1981 |
| 4277881 |
Process for fabrication of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines |
Jul. 14, 1981 |
| 4254161 |
Prevention of low pressure chemical vapor deposition silicon dioxide undercutting and flaking |
Mar. 3, 1981 |
| 4242156 |
Method of fabricating an SOS island edge passivation structure |
Dec. 30, 1980 |
| 4198851 |
Method and structure for detecting the concentration of oxygen in a substance |
Apr. 22, 1980 |
| 4181564 |
Fabrication of patterned silicon nitride insulating layers having gently sloping sidewalls |
Jan. 1, 1980 |
| 4174252 |
Method of defining contact openings in insulating layers on semiconductor devices without the formation of undesirable pinholes |
Nov. 13, 1979 |
| 4170500 |
Process for forming field dielectric regions in semiconductor structures without encroaching on device regions |
Oct. 9, 1979 |
| 4161744 |
Passivated semiconductor device and method of making same |
Jul. 17, 1979 |
| 4139442 |
Reactive ion etching method for producing deep dielectric isolation in silicon |
Feb. 13, 1979 |
| 4134125 |
Passivation of metallized semiconductor substrates |
Jan. 9, 1979 |
| 4126880 |
Germanium-containing silicon nitride film |
Nov. 21, 1978 |
| 4110125 |
Method for fabricating semiconductor devices |
Aug. 29, 1978 |
| 4105805 |
Formation of metal nitride oxide semiconductor (MNOS) by ion implantation of oxygen through a silicon nitride layer |
Aug. 8, 1978 |
| 4091169 |
Silicon oxide/silicon nitride mask with improved integrity for semiconductor fabrication |
May. 23, 1978 |
| 4080619 |
Bipolar type semiconductor device |
Mar. 21, 1978 |
| 4062707 |
Utilizing multiple polycrystalline silicon masks for diffusion and passivation |
Dec. 13, 1977 |
| 4063275 |
Semiconductor device with two passivating layers |
Dec. 13, 1977 |
| 4060827 |
Semiconductor device and a method of making the same |
Nov. 29, 1977 |
| 4057824 |
P+ Silicon integrated circuit interconnection lines |
Nov. 8, 1977 |
| 4051273 |
Field effect transistor structure and method of making same |
Sep. 27, 1977 |
| 4044454 |
Method for forming integrated circuit regions defined by recessed dielectric isolation |
Aug. 30, 1977 |
| 4038110 |
Planarization of integrated circuit surfaces through selective photoresist masking |
Jul. 26, 1977 |
| 4009481 |
Metal semiconductor diode |
Feb. 22, 1977 |
| 4002511 |
Method for forming masks comprising silicon nitride and novel mask structures produced thereby |
Jan. 11, 1977 |
| 3979768 |
Semiconductor element having surface coating comprising silicon nitride and silicon oxide films |
Sep. 7, 1976 |
| 3969168 |
Method for filling grooves and moats used on semiconductor devices |
Jul. 13, 1976 |
| 3961999 |
Method for forming recessed dielectric isolation with a minimized "bird's beak" problem |
Jun. 8, 1976 |
| 3961350 |
Method and chip configuration of high temperature pressure contact packaging of Schottky barrier diodes |
Jun. 1, 1976 |
| 3959047 |
Method for constructing a rom for redundancy and other applications |
May. 25, 1976 |
| 3947298 |
Method of forming junction regions utilizing R.F. sputtering |
Mar. 30, 1976 |
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