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Class Information
Number: 257/638
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > With means to control surface effects > Insulating coating > Multiple layers > With discontinuous or varying thickness layer (e.g., layer covers only selected portions of semiconductor)
Description: Subject matter wherein there are discontinuous or varying thickness layers in at least one of the multiple insulating layers over the semiconductor body.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7419897 |
Method of fabricating circuit board having different electrical connection structures |
Sep. 2, 2008 |
| 7420264 |
High reflector tunable stress coating, such as for a MEMS mirror |
Sep. 2, 2008 |
| 7397126 |
Semiconductor device |
Jul. 8, 2008 |
| 7391094 |
Semiconductor structure and method of making same |
Jun. 24, 2008 |
| 7388279 |
Tapered dielectric and conductor structures and applications thereof |
Jun. 17, 2008 |
| 7385277 |
Semiconductor chip and method of fabricating the same |
Jun. 10, 2008 |
| 7326987 |
Non-continuous encapsulation layer for MIM capacitor |
Feb. 5, 2008 |
| 7319274 |
Methods for selective integration of airgaps and devices made by such methods |
Jan. 15, 2008 |
| 7312400 |
Multilayer wiring board, base for multilayer wiring board, printed wiring board and its manufacturing method |
Dec. 25, 2007 |
| 7259432 |
Semiconductor device for reducing parasitic capacitance produced in the vicinity of a transistor located within the semiconductor device |
Aug. 21, 2007 |
| 7214629 |
Strain-silicon CMOS with dual-stressed film |
May. 8, 2007 |
| 7208836 |
Integrated circuitry and a semiconductor processing method of forming a series of conductive lines |
Apr. 24, 2007 |
| 7198993 |
Method of fabricating a combined fully-depleted silicon-on-insulator (FD-SOI) and partially-depleted silicon-on-insulator (PD-SOI) devices |
Apr. 3, 2007 |
| 7190052 |
Semiconductor devices with oxide coatings selectively positioned over exposed features including semiconductor material |
Mar. 13, 2007 |
| 7187038 |
Semiconductor device with MOS transistors with an etch-stop layer having an improved residual stress level and method for fabricating such a semiconductor device |
Mar. 6, 2007 |
| 7164177 |
Multi-level memory cell |
Jan. 16, 2007 |
| 7067901 |
Semiconductor devices including protective layers on active surfaces thereof |
Jun. 27, 2006 |
| 7034380 |
Low-dielectric constant structure with a multilayer stack of thin films with pores |
Apr. 25, 2006 |
| 7023093 |
Very low effective dielectric constant interconnect Structures and methods for fabricating the same |
Apr. 4, 2006 |
| 7009281 |
Small volume process chamber with hot inner surfaces |
Mar. 7, 2006 |
| 7002210 |
Semiconductor device including a high-breakdown voltage MOS transistor |
Feb. 21, 2006 |
| 6960809 |
Polysilicon thin film transistor and method of forming the same |
Nov. 1, 2005 |
| 6943451 |
Semiconductor devices containing a discontinuous cap layer and methods for forming same |
Sep. 13, 2005 |
| 6936916 |
Microelectronic assemblies and electronic devices including connection structures with multiple elongated members |
Aug. 30, 2005 |
| 6924197 |
Method of fabricating an integrated circuit with a dielectric layer exposed to a hydrogen-bearing nitrogen source |
Aug. 2, 2005 |
| 6921937 |
Integrated circuit with a dielectric layer exposed to a hydrogen-bearing nitrogen source |
Jul. 26, 2005 |
| 6919606 |
Semiconductor device comprising an insulating mask formed on parts of a gate electrode and semiconductor layer crossing an active region |
Jul. 19, 2005 |
| 6911686 |
Semiconductor memory device having planarized upper surface and a SiON moisture barrier |
Jun. 28, 2005 |
| 6876065 |
Semiconductor device and a fabrication method thereof |
Apr. 5, 2005 |
| 6876039 |
Variable threshold voltage complementary MOSFET with SOI structure |
Apr. 5, 2005 |
| 6870225 |
Transistor structure with thick recessed source/drain structures and fabrication process of same |
Mar. 22, 2005 |
| 6822309 |
Apparatus for selectively cutting fuse electrodes |
Nov. 23, 2004 |
| 6818496 |
Silicon on insulator DRAM process utilizing both fully and partially depleted devices |
Nov. 16, 2004 |
| 6818967 |
Fabricating method of low temperature poly-silicon film and low temperature poly-silicon thin film transistor |
Nov. 16, 2004 |
| 6815805 |
Method of fabricating an integrated circuit with a dielectric layer exposed to a hydrogen-bearing nitrogen source |
Nov. 9, 2004 |
| 6800928 |
Porous integrated circuit dielectric with decreased surface porosity |
Oct. 5, 2004 |
| 6798057 |
Thin stacked ball-grid array package |
Sep. 28, 2004 |
| 6784484 |
Insulating barrier, NVM bandgap design |
Aug. 31, 2004 |
| 6784504 |
Methods for forming rough ruthenium-containing layers and structures/methods using same |
Aug. 31, 2004 |
| 6756635 |
Semiconductor substrate including multiple nitrided gate insulating films |
Jun. 29, 2004 |
| 6717240 |
Fabrication method and wafer structure of semiconductor device using low-k film |
Apr. 6, 2004 |
| 6713846 |
Multilayer high .kappa. dielectric films |
Mar. 30, 2004 |
| 6707134 |
Semiconductor structure having an improved pre-metal dielectric stack and method for forming the same |
Mar. 16, 2004 |
| 6699784 |
Method for depositing a low k dielectric film (K>3.5) for hard mask application |
Mar. 2, 2004 |
| 6693341 |
Semiconductor device |
Feb. 17, 2004 |
| 6670022 |
Nanoporous dielectric films with graded density and process for making such films |
Dec. 30, 2003 |
| 6642551 |
Stable high voltage semiconductor device structure |
Nov. 4, 2003 |
| 6624446 |
Thin film transistor for liquid crystal display and method of manufacturing the same |
Sep. 23, 2003 |
| 6611059 |
Integrated circuitry conductive lines |
Aug. 26, 2003 |
| 6596633 |
Method for manufacturing a semiconductor device |
Jul. 22, 2003 |
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