| |
 |
|
Class Information
Number: 257/629
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > With means to control surface effects
Description: Subject matter wherein the active junction device has means to modify (e.g., reduce, or eliminate) electrical field effects which take place at the device surface or to modify (e.g., reduce or eliminate) inhomogeneities in electrical properties of a semiconductor crystal region due to effects caused by the discontinuity of the crystal lattice at the surface.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7423330 |
Semiconductor device with strain |
Sep. 9, 2008 |
| 7400031 |
Asymmetrically stressed CMOS FinFET |
Jul. 15, 2008 |
| 7397126 |
Semiconductor device |
Jul. 8, 2008 |
| 7364778 |
Container for an electronic component |
Apr. 29, 2008 |
| 7345299 |
Semiconductor device comprising a crystalline layer containing silicon/germanium, and comprising a silicon Enriched floating charge trapping media over the crystalline layer |
Mar. 18, 2008 |
| 7335969 |
Method of monitoring introduction of interfacial species |
Feb. 26, 2008 |
| 7332796 |
Devices and methods of preventing plasma charging damage in semiconductor devices |
Feb. 19, 2008 |
| 7301223 |
High temperature electronic devices |
Nov. 27, 2007 |
| 7253483 |
Semiconductor device layout and channeling implant process |
Aug. 7, 2007 |
| 7253514 |
Self-supporting connecting element for a semiconductor chip |
Aug. 7, 2007 |
| 7187058 |
Semiconductor component having a pn junction and a passivation layer applied on a surface |
Mar. 6, 2007 |
| 7138702 |
Integrated circuit chip |
Nov. 21, 2006 |
| 7122734 |
Isoelectronic surfactant suppression of threading dislocations in metamorphic epitaxial layers |
Oct. 17, 2006 |
| 7074710 |
Method of wafer patterning for reducing edge exclusion zone |
Jul. 11, 2006 |
| 7053405 |
Phase-shifting mask and semiconductor device |
May. 30, 2006 |
| 7045878 |
Selectively bonded thin film layer and substrate layer for processing of useful devices |
May. 16, 2006 |
| 7015567 |
Method for fabricating a semiconductor structure using a protective layer, and semiconductor structure |
Mar. 21, 2006 |
| 6998716 |
Diamond metal-filled patterns achieving low parasitic coupling capacitance |
Feb. 14, 2006 |
| 6979393 |
Method for plating copper conductors and devices formed |
Dec. 27, 2005 |
| 6975018 |
Semiconductor device |
Dec. 13, 2005 |
| 6924197 |
Method of fabricating an integrated circuit with a dielectric layer exposed to a hydrogen-bearing nitrogen source |
Aug. 2, 2005 |
| 6921937 |
Integrated circuit with a dielectric layer exposed to a hydrogen-bearing nitrogen source |
Jul. 26, 2005 |
| 6906350 |
Delta doped silicon carbide metal-semiconductor field effect transistors having a gate disposed in a double recess structure |
Jun. 14, 2005 |
| 6885051 |
Minimally spaced MRAM structures |
Apr. 26, 2005 |
| 6844617 |
Packaging mold with electrostatic discharge protection |
Jan. 18, 2005 |
| 6818967 |
Fabricating method of low temperature poly-silicon film and low temperature poly-silicon thin film transistor |
Nov. 16, 2004 |
| 6815821 |
Method of fabricating seal-ring structure with ESD protection |
Nov. 9, 2004 |
| 6815805 |
Method of fabricating an integrated circuit with a dielectric layer exposed to a hydrogen-bearing nitrogen source |
Nov. 9, 2004 |
| 6812550 |
Wafer pattern variation of integrated circuit fabrication |
Nov. 2, 2004 |
| 6797991 |
Nitride semiconductor device |
Sep. 28, 2004 |
| 6781184 |
Barrier layers for protecting metal oxides from hydrogen degradation |
Aug. 24, 2004 |
| 6765282 |
Semiconductor structure and method for determining critical dimensions and overlay error |
Jul. 20, 2004 |
| 6734531 |
Use of selective oxidation conditions for dielectric conditioning |
May. 11, 2004 |
| 6713844 |
Semiconductor-chip mounting substrate having at least one projection thereon and a pressure holding means |
Mar. 30, 2004 |
| 6707061 |
Field emission type electron source |
Mar. 16, 2004 |
| 6703715 |
Semiconductor device having interconnection layer with multiply layered sidewall insulation film |
Mar. 9, 2004 |
| 6693345 |
Semiconductor wafer assemblies comprising photoresist over silicon nitride materials |
Feb. 17, 2004 |
| 6693340 |
Lateral semiconductor device |
Feb. 17, 2004 |
| 6674151 |
Deuterium passivated semiconductor device having enhanced immunity to hot carrier effects |
Jan. 6, 2004 |
| 6673675 |
Methods of fabricating an MRAM device using chemical mechanical polishing |
Jan. 6, 2004 |
| 6657282 |
Semiconductor device having a ball grid array and a fabrication process thereof |
Dec. 2, 2003 |
| 6653663 |
Nitride semiconductor device |
Nov. 25, 2003 |
| 6613677 |
Long range ordered semiconductor interface phase and oxides |
Sep. 2, 2003 |
| 6608531 |
Temperature compensated crystal oscillator package |
Aug. 19, 2003 |
| 6600203 |
Semiconductor device with silicon carbide suppression layer for preventing extension of micropipe |
Jul. 29, 2003 |
| 6576979 |
Use of selective oxidation conditions for dielectric conditioning |
Jun. 10, 2003 |
| 6576981 |
Reduced particulate etching |
Jun. 10, 2003 |
| 6566736 |
Die seal for semiconductor device moisture protection |
May. 20, 2003 |
| 6555487 |
Method of selective oxidation conditions for dielectric conditioning |
Apr. 29, 2003 |
| 6541117 |
Silicon epitaxial wafer and a method for producing it |
Apr. 1, 2003 |
|
|
|