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Class Information
Number: 257/618
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Physical configuration of semiconductor (e.g., mesa, bevel, groove, etc.)
Description: Subject matter wherein the device has a particular physical form, such as a mesa or bevel or groove.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6291897 |
Carriers including projected contact structures for engaging bumped semiconductor devices |
Sep. 18, 2001 |
| 6291863 |
Thin film transistor having a multi-layer stacked channel and its manufacturing method |
Sep. 18, 2001 |
| 6288648 |
Apparatus and method for determining a need to change a polishing pad conditioning wheel |
Sep. 11, 2001 |
| 6285072 |
Semiconductor device containing a porous structure and method of manufacturing the same |
Sep. 4, 2001 |
| 6271578 |
Crack stops |
Aug. 7, 2001 |
| 6268655 |
Semiconductor device including edge bond pads and methods |
Jul. 31, 2001 |
| 6268641 |
Semiconductor wafer having identification indication and method of manufacturing the same |
Jul. 31, 2001 |
| 6265234 |
Alignment system for a spherical device |
Jul. 24, 2001 |
| 6255721 |
Method and tool for handling micro-mechanical structures |
Jul. 3, 2001 |
| 6245630 |
Spherical shaped semiconductor integrated circuit |
Jun. 12, 2001 |
| 6245653 |
Method of filling an opening in an insulating layer |
Jun. 12, 2001 |
| 6246090 |
Power trench transistor device source region formation using silicon spacer |
Jun. 12, 2001 |
| 6242817 |
Fabricated wafer for integration in a wafer structure |
Jun. 5, 2001 |
| 6242761 |
Nitride compound semiconductor light emitting device |
Jun. 5, 2001 |
| 6242783 |
Semiconductor device with insulated gate transistor |
Jun. 5, 2001 |
| 6236102 |
Chip type thin film capacitor, and manufacturing method therefor |
May. 22, 2001 |
| 6236104 |
Silicon on insulator structure from low defect density single crystal silicon |
May. 22, 2001 |
| 6223331 |
Semiconductor circuit design method for employing spacing constraints and circuits thereof |
Apr. 24, 2001 |
| 6221165 |
High temperature plasma-assisted diffusion |
Apr. 24, 2001 |
| 6218701 |
Power MOS device with increased channel width and process for forming same |
Apr. 17, 2001 |
| 6215172 |
Grinding technique for integrated circuits |
Apr. 10, 2001 |
| 6208007 |
Buried layer in a semiconductor formed by bonding |
Mar. 27, 2001 |
| 6198158 |
Memory circuit including a semiconductor structure having more usable substrate area |
Mar. 6, 2001 |
| 6184570 |
Integrated circuit dies including thermal stress reducing grooves and microelectronic packages utilizing the same |
Feb. 6, 2001 |
| 6178654 |
Method and system for aligning spherical-shaped objects |
Jan. 30, 2001 |
| 6150708 |
Advanced CMOS circuitry that utilizes both sides of a wafer surface for increased circuit density |
Nov. 21, 2000 |
| 6136617 |
Alignment system for a spherical shaped device |
Oct. 24, 2000 |
| 6127714 |
Method for producing semiconductor device and photodetector device |
Oct. 3, 2000 |
| 6127717 |
Totally self-aligned transistor with polysilicon shallow trench isolation |
Oct. 3, 2000 |
| 6121651 |
Dram cell with three-sided-gate transfer device |
Sep. 19, 2000 |
| 6114747 |
Process design for wafer edge in VLSI |
Sep. 5, 2000 |
| 6104081 |
Semiconductor device with semiconductor elements formed in a layer of semiconductor material glued on a support wafer |
Aug. 15, 2000 |
| 6100533 |
Three-axis asymmetric radiation detector system |
Aug. 8, 2000 |
| 6100576 |
Silicon substrate having a recess for receiving an element |
Aug. 8, 2000 |
| 6097050 |
Memory configuration with self-aligning non-integrated capacitor configuration |
Aug. 1, 2000 |
| 6093935 |
Transistor and method for manufacturing the same |
Jul. 25, 2000 |
| 6091083 |
Gallium nitride type compound semiconductor light-emitting device having buffer layer with non-flat surface |
Jul. 18, 2000 |
| 6091130 |
Semiconductor device having structure suitable for CMP process |
Jul. 18, 2000 |
| 6071315 |
Two-dimensional to three-dimensional VLSI design |
Jun. 6, 2000 |
| 6060665 |
Grooved paths for printed wiring board with obstructions |
May. 9, 2000 |
| 6054748 |
High voltage semiconductor power device |
Apr. 25, 2000 |
| 6054768 |
Metal fill by treatment of mobility layers |
Apr. 25, 2000 |
| 6051889 |
Semiconductor device having a flip-chip structure |
Apr. 18, 2000 |
| 6051871 |
Heterojunction bipolar transistor having improved heat dissipation |
Apr. 18, 2000 |
| 6043507 |
Thin film transistors and methods of making |
Mar. 28, 2000 |
| 6040618 |
Multi-chip module employing a carrier substrate with micromachined alignment structures and method of forming |
Mar. 21, 2000 |
| 6034417 |
Semiconductor structure having more usable substrate area and method for forming same |
Mar. 7, 2000 |
| 6028347 |
Semiconductor structures and packaging methods |
Feb. 22, 2000 |
| 6025638 |
Structure for precision multichip assembly |
Feb. 15, 2000 |
| 6020624 |
Semiconductor package with bi-substrate die |
Feb. 1, 2000 |
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