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Class Information
Number: 257/607
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > With specified dopant (e.g., plural dopants of same conductivity in same region)
Description: Subject matter wherein the active solid-state device contains impurity dopant atoms which are specified and are used to change the conductive properties of the semiconductor material.


Sub-classes under this class:

Class Number Class Name Patents
257/610 Deep level dopant 93
257/609 For compound semiconductor (e.g., deep level dopant) 105
257/608 Switching device based on filling and emptying of deep energy levels 31


Patents under this class:
1 2 3 4 5 6

Patent Number Title Of Patent Date Issued
4875944 Amorphous photoelectric converting device Oct. 24, 1989
4875085 Semiconductor device with shallow n-type region with arsenic or antimony and phosphorus Oct. 17, 1989
4873199 Method of making bipolar integrated circuits Oct. 10, 1989
4851360 NMOS source/drain doping with both P and As Jul. 25, 1989
4836788 Production of solid-state image pick-up device with uniform distribution of dopants Jun. 6, 1989
4835112 CMOS salicide process using germanium implantation May. 30, 1989
4825081 Light-activated series-connected pin diode switch Apr. 25, 1989
4821091 Polysilicon photoconductor for integrated circuits Apr. 11, 1989
4819040 Epitaxial CMOS by oxygen implantation Apr. 4, 1989
4782028 Process methodology for two-sided fabrication of devices on thinned silicon Nov. 1, 1988
4769689 Stress relief in epitaxial wafers Sep. 6, 1988
4746964 Modification of properties of p-type dopants with other p-type dopants May. 24, 1988
4722913 Doped semiconductor vias to contacts Feb. 2, 1988
4721683 Use of alkylphosphines and alkylarsines in ion implantation Jan. 26, 1988
4689667 Method of controlling dopant diffusion and dopant electrical activation by implanted inert gas atoms Aug. 25, 1987
4683645 Process of fabricating MOS devices having shallow source and drain junctions Aug. 4, 1987
4667218 NPN transistor with base double doped with arsenic and boron May. 19, 1987
4637836 Profile control of boron implant Jan. 20, 1987
4621411 Laser-enhanced drive in of source and drain diffusions Nov. 11, 1986
4584026 Ion-implantation of phosphorus, arsenic or boron by pre-amorphizing with fluorine ions Apr. 22, 1986
4566175 Method of making insulated gate field effect transistor with a lightly doped drain using oxide sidewall spacer and double implantations Jan. 28, 1986
4560582 Method of preparing a semiconductor device Dec. 24, 1985
4559696 Ion implantation to increase emitter energy gap in bipolar transistors Dec. 24, 1985
4515642 Method of forming deep aluminum doped silicon by implanting Al and Si ions through alumina layer and device formed thereby May. 7, 1985
4513310 Semiconductor device capable of structural selection Apr. 23, 1985
4502206 Method of forming semiconductor contacts by implanting ions of neutral species at the interfacial region Mar. 5, 1985
4499483 Silicon photodiode with n-type control layer Feb. 12, 1985
4482393 Method of activating implanted ions by incoherent light beam Nov. 13, 1984
4447272 Method for fabricating MNOS structures utilizing hydrogen ion implantation May. 8, 1984
4426234 Method of forming reproducible impurity zone of gallium or aluminum in a wafer by implanting through composite layers and diffusion annealing Jan. 17, 1984
4415370 Method of beryllium implantation in germanium substrate Nov. 15, 1983
4412235 Integrated opto-electronic relay using a semiconductor with persistent photoconductivity and a matrix of such relays Oct. 25, 1983
4406710 Mask-saving technique for forming CMOS source/drain regions Sep. 27, 1983
4394180 Method of forming high resistivity regions in GaAs by deuteron implantation Jul. 19, 1983
4383268 High-current, high-voltage semiconductor devices having a metallurgical grade substrate May. 10, 1983
4371403 Method of providing gettering sites through electrode windows Feb. 1, 1983
4369072 Method for forming IGFET devices having improved drain voltage characteristics Jan. 18, 1983
4368083 Process for doping semiconductors Jan. 11, 1983
4364778 Formation of multilayer dopant distributions in a semiconductor Dec. 21, 1982
4353754 Thermo-sensitive switching element manufacturing method Oct. 12, 1982
4332627 Method of eliminating lattice defects in a semiconductor device Jun. 1, 1982
4329774 Silicon resistor having a very low temperature coefficient May. 18, 1982
4240096 Fluorine-doped P type silicon Dec. 16, 1980
4223336 Low resistivity ohmic contacts for compound semiconductor devices Sep. 16, 1980
4210466 Process for preparing heat sensitive semiconductor switch Jul. 1, 1980
4181538 Method for making defect-free zone by laser-annealing of doped silicon Jan. 1, 1980
4151011 Process of producing semiconductor thermally sensitive switching element by selective implantation of inert ions in thyristor structure Apr. 24, 1979
4149905 Method of limiting stacking faults in oxidized silicon wafers Apr. 17, 1979
4137103 Silicon integrated circuit region containing implanted arsenic and germanium Jan. 30, 1979
4116719 Method of making semiconductor device with PN junction in stacking-fault free zone Sep. 26, 1978

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