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Class Information
Number: 257/575
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Bipolar transistor structure > Plural non-isolated transistor structures in same structure > Complementary transistors share common active region (e.g., integrated injection logic, i 2 l) > Including lateral bipolar transistor structure
Description: Subject matter wherein at least one of the complementary bipolar transistors sharing a common region is a lateral bipolar transistor (i.e., has current flow between its emitter and collector parallel to a major surface of the semiconductor chip).


Sub-classes under this class:

Class Number Class Name Patents
257/576 With contacts of refractory material (e.g., polysilicon, silicide of refractory or platinum group metal) 72


Patents under this class:
1 2 3 4

Patent Number Title Of Patent Date Issued
4450468 Gallium arsenide ISL gate with punched-through bipolar driver transistor May. 22, 1984
4433471 Method for the formation of high density memory cells using ion implantation techniques Feb. 28, 1984
4415816 Monolithically integrated circuit for the production of long pulses Nov. 15, 1983
4412142 Integrated circuit incorporating low voltage and high voltage semiconductor devices Oct. 25, 1983
4404738 Method of fabricating an I.sup.2 L element and a linear transistor on one chip Sep. 20, 1983
4390802 Low-voltage, high-noise immunity I.sup.2 L interface Jun. 28, 1983
4370627 Integrated injection logic amplifier and oscillator circuits Jan. 25, 1983
4348600 Controlled current source for I.sup.2 L to analog interfaces Sep. 7, 1982
4348595 Circuit including at least two MTL semi-conducting devices showing different rise times and logic circuits made-up therefrom Sep. 7, 1982
4340827 Semiconductor integrated circuit Jul. 20, 1982
4338139 Method of forming Schottky-I.sup.2 L devices by implantation and laser bombardment Jul. 6, 1982
4338619 Flip-flop circuit Jul. 6, 1982
4326135 Differential to single-ended converter utilizing inverted transistors Apr. 20, 1982
4326212 Structure and process for optimizing the characteristics of I.sup.2 L devices Apr. 20, 1982
4292675 Five device merged transistor RAM cell Sep. 29, 1981
4286177 Integrated injection logic circuits Aug. 25, 1981
4277701 Semiconductor integrated injection logic structure controlled by the injector Jul. 7, 1981
4259730 IIL With partially spaced collars Mar. 31, 1981
4256984 Interlevel interface for series powered IIL or SITL Mar. 17, 1981
4255209 Process of fabricating an improved I.sup.2 L integrated circuit utilizing diffusion and epitaxial deposition Mar. 10, 1981
4255671 IIL Type semiconductor integrated circuit Mar. 10, 1981
4246500 Current mirror circuit Jan. 20, 1981
4243896 I.sup.2 L Circuit with auxiliary transistor Jan. 6, 1981
4244001 Fabrication of an integrated injection logic device with narrow basewidth Jan. 6, 1981
4231108 Semiconductor integrated circuit device Oct. 28, 1980
4231109 Semiconductor integrated circuit device Oct. 28, 1980
4228525 Semiconductor integrated circuit device Oct. 14, 1980
4220961 Monolithic combination of two complementary bipolar transistors Sep. 2, 1980
4210925 I.sup.2 L Integrated circuit and process of fabrication Jul. 1, 1980
4203042 Integrated circuit May. 13, 1980
4200878 Method of fabricating a narrow base-width bipolar device and the product thereof Apr. 29, 1980
4199776 Integrated injection logic with floating reinjectors Apr. 22, 1980
4199775 Integrated circuit and method for fabrication thereof Apr. 22, 1980
4197470 Triggerable flip-flop Apr. 8, 1980
4181981 Bipolar two device dynamic memory cell Jan. 1, 1980
4163244 Symmetrical integrated injection logic circuit Jul. 31, 1979
4158782 I.sup.2 L interface with external inputs and method thereof Jun. 19, 1979
4158146 Device for coupling transistors operated in I.sup.2 L to a transistor operated at a higher bias-current Jun. 12, 1979
4156154 Flip-flop circuit May. 22, 1979
4156246 Combined ohmic and Schottky output transistors for logic circuit May. 22, 1979
4155014 Logic element having low power consumption May. 15, 1979
4153487 Method of manufacturing intergrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques May. 8, 1979
4151019 Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques Apr. 24, 1979
4144106 Manufacture of an I.sup.2 device utilizing staged selective diffusion thru a polycrystalline mask Mar. 13, 1979
4144098 P.sup.+ Buried layer for I.sup.2 L isolation by ion implantation Mar. 13, 1979
4144586 Substrate-fed injection-coupled memory Mar. 13, 1979
4143284 Arrangement for supplying I.sup.2 L circuits with differing currents Mar. 6, 1979
4140922 Amplifier stage for the current supply of I.sup.2 L circuits Feb. 20, 1979
4137469 Threshold-effect integrated injection logic circuit with hysteresis Jan. 30, 1979
4131806 I.I.L. with injector base resistor and schottky clamp Dec. 26, 1978

1 2 3 4


 
 
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