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Class Information
Number: 257/575
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Bipolar transistor structure > Plural non-isolated transistor structures in same structure > Complementary transistors share common active region (e.g., integrated injection logic, i 2 l) > Including lateral bipolar transistor structure
Description: Subject matter wherein at least one of the complementary bipolar transistors sharing a common region is a lateral bipolar transistor (i.e., has current flow between its emitter and collector parallel to a major surface of the semiconductor chip).
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6008524 |
Integrated injection logic semiconductor device |
Dec. 28, 1999 |
| 6005283 |
Complementary bipolar transistors |
Dec. 21, 1999 |
| 6005282 |
Integrated circuit with complementary isolated bipolar transistors |
Dec. 21, 1999 |
| 5939759 |
Silicon-on-insulator device with floating collector |
Aug. 17, 1999 |
| 5852559 |
Power application circuits utilizing bidirectional insulated gate bipolar transistor |
Dec. 22, 1998 |
| 5831328 |
Semiconductor device and manufacturing method of the device |
Nov. 3, 1998 |
| 5747837 |
Semiconductor device having input protective function |
May. 5, 1998 |
| 5693978 |
Reset signal output circuit and semiconductor integrated circuit device |
Dec. 2, 1997 |
| 5670822 |
CMOS process compatible self-alignment lateral bipolar junction transistor |
Sep. 23, 1997 |
| 5666001 |
Transistor wherein the base area is covered with an insulating layer which is overlaid with a conductive film that might be polysilicon crystal or aluminum |
Sep. 9, 1997 |
| 5654561 |
Insulated gate bipolar transistor with multiple buffer layers |
Aug. 5, 1997 |
| 5646055 |
Method for making bipolar transistor |
Jul. 8, 1997 |
| 5554543 |
Process for fabricating bipolar junction transistor having reduced parasitic capacitance |
Sep. 10, 1996 |
| 5536952 |
Heterojunction bipolar transistor |
Jul. 16, 1996 |
| 5530381 |
Integrated high-speed bipolar logic circuit method |
Jun. 25, 1996 |
| 5506157 |
Method for fabricating pillar bipolar transistor |
Apr. 9, 1996 |
| 5504368 |
Semiconductor integrated circuit device with self-aligned superhigh speed bipolar transistor |
Apr. 2, 1996 |
| 5485024 |
Electrostatic discharge circuit |
Jan. 16, 1996 |
| 5481132 |
Transistor with a predetermined current gain in a bipolar integrated circuit |
Jan. 2, 1996 |
| 5481130 |
Semiconductor IIL device with dielectric and diffusion isolation |
Jan. 2, 1996 |
| 5455188 |
Process for fabricating a lateral bipolar junction transistor |
Oct. 3, 1995 |
| 5402016 |
Integrated high-speed bipolar logic circuit |
Mar. 28, 1995 |
| 5378921 |
Heterojunction multicollector transistor |
Jan. 3, 1995 |
| 5355015 |
High breakdown lateral PNP transistor |
Oct. 11, 1994 |
| 5347156 |
Lateral bipolar transistor with a particular collector structure |
Sep. 13, 1994 |
| 5329145 |
Heterojunction bipolar transistor and its integration method |
Jul. 12, 1994 |
| 5315135 |
Semiconductor device having I.sup.2 L gate with heterojunction |
May. 24, 1994 |
| 5296732 |
Bipolar transistor |
Mar. 22, 1994 |
| 5276638 |
Bipolar memory cell with isolated PNP load |
Jan. 4, 1994 |
| 5266819 |
Self-aligned gallium arsenide/aluminum gallium arsenide collector-up heterojunction bipolar transistors capable of microwave applications and method |
Nov. 30, 1993 |
| 5254486 |
Method for forming PNP and NPN bipolar transistors in the same substrate |
Oct. 19, 1993 |
| 5237198 |
Lateral PNP transistor using a latch voltage of NPN transistor |
Aug. 17, 1993 |
| 5177585 |
P-N-P diamond transistor |
Jan. 5, 1993 |
| 5103281 |
MOS-cascoded bipolar current sources in non-epitaxial structure |
Apr. 7, 1992 |
| 5066869 |
Reset circuit with PNP saturation detector |
Nov. 19, 1991 |
| 5023192 |
Method of manufacturing a bipolar transistor |
Jun. 11, 1991 |
| 4826780 |
Method of making bipolar transistors |
May. 2, 1989 |
| 4743565 |
Lateral device structures using self-aligned fabrication techniques |
May. 10, 1988 |
| 4714842 |
Integrated injection logic circuits |
Dec. 22, 1987 |
| 4672579 |
MTL storage cell with inherent output multiplex capability |
Jun. 9, 1987 |
| 4644381 |
I.sup.2 L heterostructure bipolar transistors and method of making the same |
Feb. 17, 1987 |
| 4583106 |
Fabrication methods for high performance lateral bipolar transistors |
Apr. 15, 1986 |
| 4577123 |
Integrated logic circuit having collector node with pull-up and clamp |
Mar. 18, 1986 |
| 4549196 |
Lateral bipolar transistor |
Oct. 22, 1985 |
| 4535425 |
Highly integrated, high-speed memory with bipolar transistors |
Aug. 13, 1985 |
| 4507848 |
Control of substrate injection in lateral bipolar transistors |
Apr. 2, 1985 |
| 4489341 |
Merged-transistor switch with extra P-type region |
Dec. 18, 1984 |
| 4489247 |
Integrated injection logic circuit with test pads on injector common line |
Dec. 18, 1984 |
| 4470061 |
Integrated injection logic |
Sep. 4, 1984 |
| 4459606 |
Integrated injection logic semiconductor devices |
Jul. 10, 1984 |
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