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Class Information
Number: 257/548
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Integrated circuit structure with electrically isolated components > With pn junction isolation > At least three regions of alternating conductivity types with dopant concentration gradients decreasing from surface of semiconductor (e.g., "triple-diffused" integrated circuit)
Description: Subject matter including at least three regions of alternating conductivity type (p or n), with each successive region contained within the previous region, and each of the regions having a doping concentration which decreases with distance from the same external surface of the semiconductor body.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7443009 |
N well implants to separate blocks in a flash memory device |
Oct. 28, 2008 |
| 7411272 |
Semiconductor device and method of forming a semiconductor device |
Aug. 12, 2008 |
| 7358191 |
Method for decreasing sheet resistivity variations of an interconnect metal layer |
Apr. 15, 2008 |
| 7345355 |
Complementary junction-narrowing implants for ultra-shallow junctions |
Mar. 18, 2008 |
| 7306990 |
Information storage element, manufacturing method thereof, and memory array |
Dec. 11, 2007 |
| 7268410 |
Integrated switching voltage regulator using copper process technology |
Sep. 11, 2007 |
| 7259428 |
Semiconductor device using SOI structure having a triple-well region |
Aug. 21, 2007 |
| 7247533 |
Method of fabricating semiconductor device using selective epitaxial growth |
Jul. 24, 2007 |
| 7230314 |
Semiconductor device and method of forming a semiconductor device |
Jun. 12, 2007 |
| 7230263 |
Gallium nitride compound semiconductor element |
Jun. 12, 2007 |
| 7183216 |
Methods to form oxide-filled trenches |
Feb. 27, 2007 |
| 7119393 |
Transistor having fully-depleted junctions to reduce capacitance and increase radiation immunity in an integrated circuit |
Oct. 10, 2006 |
| 7084030 |
Method of forming a non-volatile memory device having floating trap type memory cell |
Aug. 1, 2006 |
| 7038234 |
Thermoelectric module with Si/SiGe and B4C/B9C super-lattice legs |
May. 2, 2006 |
| 7022566 |
Integrated radio frequency circuits |
Apr. 4, 2006 |
| 7009271 |
Memory device with an alternating Vss interconnection |
Mar. 7, 2006 |
| 7002222 |
Integrated semiconductor memory circuit and method of manufacturing the same |
Feb. 21, 2006 |
| 7002218 |
Low capacitance ESD-protection structure under a bond pad |
Feb. 21, 2006 |
| 6989567 |
LDMOS transistor |
Jan. 24, 2006 |
| 6972475 |
Semiconductor device |
Dec. 6, 2005 |
| 6940110 |
SiC-MISFET and method for fabricating the same |
Sep. 6, 2005 |
| 6917095 |
Integrated radio frequency circuits |
Jul. 12, 2005 |
| 6900518 |
Semiconductor device |
May. 31, 2005 |
| 6897536 |
ESD protection circuit |
May. 24, 2005 |
| 6847084 |
Semiconductor device |
Jan. 25, 2005 |
| 6830963 |
Fully depleted silicon-on-insulator CMOS logic |
Dec. 14, 2004 |
| 6812486 |
Conductive structure and method of forming the structure |
Nov. 2, 2004 |
| 6765262 |
Vertical high-voltage semiconductor component |
Jul. 20, 2004 |
| 6707115 |
Transistor with minimal hot electron injection |
Mar. 16, 2004 |
| 6703684 |
Semiconductor device and method of forming a semiconductor device |
Mar. 9, 2004 |
| 6664602 |
Semiconductor device and method of manufacturing the same |
Dec. 16, 2003 |
| 6635932 |
Thin film crystal growth by laser annealing |
Oct. 21, 2003 |
| 6614087 |
Semiconductor device |
Sep. 2, 2003 |
| 6605857 |
Reducing magnetic coupling using triple well |
Aug. 12, 2003 |
| 6593629 |
Semiconductor device |
Jul. 15, 2003 |
| 6465869 |
Compensation component and process for producing the compensation component |
Oct. 15, 2002 |
| 6441442 |
Integrated inductive circuits |
Aug. 27, 2002 |
| 6420774 |
Low junction capacitance semiconductor structure and I/O buffer |
Jul. 16, 2002 |
| 6404036 |
Semiconductor memory device with a triple well structure |
Jun. 11, 2002 |
| 6392268 |
Nonvolatile semiconductor storage apparatus and production method of the same |
May. 21, 2002 |
| 6255713 |
Current source using merged vertical bipolar transistor based on gate induced gate leakage current |
Jul. 3, 2001 |
| 6225151 |
Nitrogen liner beneath transistor source/drain regions to retard dopant diffusion |
May. 1, 2001 |
| 6127732 |
Semiconductor device having high aspect ratio contacts |
Oct. 3, 2000 |
| 6111282 |
Charge-pumping to increase electron collection efficiency |
Aug. 29, 2000 |
| 6107672 |
Semiconductor device having a plurality of buried wells |
Aug. 22, 2000 |
| 6097078 |
Method for forming triple well in semiconductor device |
Aug. 1, 2000 |
| 6060742 |
ETOX cell having bipolar electron injection for substrate-hot-electron program |
May. 9, 2000 |
| 6057588 |
Semiconductor integrated circuit device with digital circuit and analog circuit on common substrate and fabrication process therefor |
May. 2, 2000 |
| 5818099 |
MOS high frequency switch circuit using a variable well bias |
Oct. 6, 1998 |
| RE35442 |
Mixed technology integrated circuit comprising CMOS structures and efficient lateral bipolar transistors with a high early voltage and fabrication thereof |
Feb. 4, 1997 |
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