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Class Information
Number: 257/518
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Integrated circuit structure with electrically isolated components > Including dielectric isolation means > Combined with pn junction isolation (e.g., isoplanar, locos) > Dielectric in groove > With bipolar transistor structure > With polycrystalline connecting region (e.g., polysilicon base contact)
Description: Subject matter wherein the device has portions of polycrystalline (i.e., made up of many small crystals) semiconductor material serving as electrical contacts or connections.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7439558 |
Method and system for controlled oxygen incorporation in compound semiconductor films for device performance enhancement |
Oct. 21, 2008 |
| 7026690 |
Memory devices and electronic systems comprising integrated bipolar and FET devices |
Apr. 11, 2006 |
| 6879021 |
Electronically programmable antifuse and circuits made therewith |
Apr. 12, 2005 |
| 6856000 |
Reduce 1/f noise in NPN transistors without degrading the properties of PNP transistors in integrated circuit technologies |
Feb. 15, 2005 |
| 6828650 |
Bipolar junction transistor structure with improved current gain characteristics |
Dec. 7, 2004 |
| 6690083 |
Use of silicide blocking layer to create high valued resistor and diode for sub-1V bandgap |
Feb. 10, 2004 |
| 6646320 |
Method of forming contact to poly-filled trench isolation region |
Nov. 11, 2003 |
| 6534820 |
Integrated dynamic memory cell having a small area of extent, and a method for its production |
Mar. 18, 2003 |
| 6525403 |
Semiconductor device having MIS field effect transistors or three-dimensional structure |
Feb. 25, 2003 |
| 6495897 |
Integrated circuit having etch-resistant layer substantially covering shallow trench regions |
Dec. 17, 2002 |
| 6433387 |
Lateral bipolar transistor |
Aug. 13, 2002 |
| 6376880 |
High-speed lateral bipolar device in SOI process |
Apr. 23, 2002 |
| 6329699 |
Bipolar transistor with trenched-groove isolation regions |
Dec. 11, 2001 |
| 6093953 |
Isolation regions and methods of forming isolation regions |
Jul. 25, 2000 |
| 6073343 |
Method of providing a variable guard ring width between detectors on a substrate |
Jun. 13, 2000 |
| 6005284 |
Semiconductor device and its manufacturing method |
Dec. 21, 1999 |
| 5998816 |
Sensor element with removal resistance region |
Dec. 7, 1999 |
| 5982021 |
Vertical polysilicon diode compatible with CMOS/BiCMOS integrated circuit processes |
Nov. 9, 1999 |
| 5914523 |
Semiconductor device trench isolation structure with polysilicon bias voltage contact |
Jun. 22, 1999 |
| 5910676 |
Method for forming a thick base oxide in a BiCMOS process |
Jun. 8, 1999 |
| 5909623 |
Manufacturing method of semiconductor device |
Jun. 1, 1999 |
| 5877539 |
Bipolar transistor with a reduced collector series resistance |
Mar. 2, 1999 |
| 5861659 |
Semiconductor device |
Jan. 19, 1999 |
| 5856700 |
Semiconductor device with doped semiconductor and dielectric trench sidewall layers |
Jan. 5, 1999 |
| 5856228 |
Manufacturing method for making bipolar device having double polysilicon structure |
Jan. 5, 1999 |
| 5854503 |
Maximization of low dielectric constant material between interconnect traces of a semiconductor circuit |
Dec. 29, 1998 |
| 5847438 |
Bonded IC substrate with a high breakdown voltage and large current capabilities |
Dec. 8, 1998 |
| 5834800 |
Heterojunction bipolar transistor having mono crystalline SiGe intrinsic base and polycrystalline SiGe and Si extrinsic base regions |
Nov. 10, 1998 |
| 5763932 |
Isolation regions and methods of forming isolation regions |
Jun. 9, 1998 |
| 5733791 |
Methods for fabrication of bipolar device having high ratio of emitter to base area |
Mar. 31, 1998 |
| 5604374 |
Semiconductor device and manufacturing method thereof |
Feb. 18, 1997 |
| 5581112 |
Lateral bipolar transistor having buried base contact |
Dec. 3, 1996 |
| 5548155 |
Bipolar type semiconductor device having small parasitic capacitance, small dimensions, and small variation in transistor characteristics |
Aug. 20, 1996 |
| 5541124 |
Method for making bipolar transistor having double polysilicon structure |
Jul. 30, 1996 |
| 5506157 |
Method for fabricating pillar bipolar transistor |
Apr. 9, 1996 |
| 5504364 |
CMOS locos isolation for self-aligned NPN BJT in a BiCMOS process |
Apr. 2, 1996 |
| 5468989 |
Semiconductor integrated circuit device having an improved vertical bipolar transistor structure |
Nov. 21, 1995 |
| 5444285 |
Complementary bipolar polysilicon emitter devices |
Aug. 22, 1995 |
| 5420457 |
Lateral high-voltage PNP transistor |
May. 30, 1995 |
| 5420454 |
Selective epitaxial silicon for intrinsic-extrinsic base link |
May. 30, 1995 |
| 5397912 |
Lateral bipolar transistor |
Mar. 14, 1995 |
| 5365090 |
Hetero bipolar transistor and method of manufacturing the same |
Nov. 15, 1994 |
| 5341023 |
Novel vertical-gate CMOS compatible lateral bipolar transistor |
Aug. 23, 1994 |
| 5298779 |
Collector of a bipolar transistor compatible with MOS technology |
Mar. 29, 1994 |
| 5294558 |
Method of making double-self-aligned bipolar transistor structure |
Mar. 15, 1994 |
| 5234846 |
Method of making bipolar transistor with reduced topography |
Aug. 10, 1993 |
| 5234845 |
Method of manufacturing semiconductor IC using selective poly and EPI silicon growth |
Aug. 10, 1993 |
| 5221856 |
Bipolar transistor with floating guard region under extrinsic base |
Jun. 22, 1993 |
| 5216276 |
Semiconductor integrated circuit device having high matching degree and high integration density |
Jun. 1, 1993 |
| 5175607 |
Semiconductor device and manufacturing method thereof |
Dec. 29, 1992 |
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