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Class Information
Number: 257/515
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Integrated circuit structure with electrically isolated components > Including dielectric isolation means > Combined with pn junction isolation (e.g., isoplanar, locos) > Dielectric in groove > With active junction abutting groove (e.g., "walled emitter")
Description: Subject matter wherein at least one pn junction forming a part of an active solid-state device terminates against the dielectric filling in the isolation groove.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7358108 |
CMOS image sensor and method for fabricating the same |
Apr. 15, 2008 |
| 7304390 |
Anisotropic conductive sheet and manufacture thereof |
Dec. 4, 2007 |
| 7279769 |
Semiconductor device and manufacturing method thereof |
Oct. 9, 2007 |
| 7105908 |
SRAM cell having stepped boundary regions and methods of fabrication |
Sep. 12, 2006 |
| 7038290 |
Integrated circuit device |
May. 2, 2006 |
| 7026695 |
Method and apparatus to reduce parasitic forces in electro-mechanical systems |
Apr. 11, 2006 |
| 6882025 |
Strained-channel transistor and methods of manufacture |
Apr. 19, 2005 |
| 6875649 |
Methods for manufacturing integrated circuit devices including an isolation region defining an active region area |
Apr. 5, 2005 |
| 6867472 |
Reduced hot carrier induced parasitic sidewall device activation in isolated buried channel devices by conductive buried channel depth optimization |
Mar. 15, 2005 |
| 6847094 |
Contact structure on a deep region formed in a semiconductor substrate |
Jan. 25, 2005 |
| 6703679 |
Low-resistivity microelectromechanical structures with co-fabricated integrated circuit |
Mar. 9, 2004 |
| 6696743 |
Semiconductor transistor having gate electrode and/or gate wiring |
Feb. 24, 2004 |
| 6693325 |
Semiconductor device having silicon on insulator and fabricating method therefor |
Feb. 17, 2004 |
| 6683364 |
Integrated circuit devices including an isolation region defining an active region area and methods for manufacturing the same |
Jan. 27, 2004 |
| 6661077 |
Semiconductor device including primary connecting plug and an auxiliary connecting plug |
Dec. 9, 2003 |
| 6661076 |
Semiconductor device |
Dec. 9, 2003 |
| 6646320 |
Method of forming contact to poly-filled trench isolation region |
Nov. 11, 2003 |
| 6555891 |
SOI hybrid structure with selective epitaxial growth of silicon |
Apr. 29, 2003 |
| 6545302 |
Image sensor capable of decreasing leakage current between diodes and method for fabricating the same |
Apr. 8, 2003 |
| 6525403 |
Semiconductor device having MIS field effect transistors or three-dimensional structure |
Feb. 25, 2003 |
| 6448606 |
Semiconductor with increased gate coupling coefficient |
Sep. 10, 2002 |
| 6404020 |
Method of forming contact pads in a semiconductor device and a semiconductor device formed using the method |
Jun. 11, 2002 |
| 6380599 |
Method and apparatus for trench isolation process with pad gate and trench edge spacer elimination |
Apr. 30, 2002 |
| 6329699 |
Bipolar transistor with trenched-groove isolation regions |
Dec. 11, 2001 |
| 6294817 |
Source/drain-on insulator (S/DOI) field effect transistor using oxidized amorphous silicon and method of fabrication |
Sep. 25, 2001 |
| 6261920 |
N-channel MOSFET having STI structure and method for manufacturing the same |
Jul. 17, 2001 |
| 6222224 |
Erasable and programmable nonvolatile semiconductor memory, semiconductor integrated circuit device having the semiconductor memory and method of manufacturing the semiconductor memory |
Apr. 24, 2001 |
| 6144086 |
Structure for improved latch-up using dual depth STI with impurity implant |
Nov. 7, 2000 |
| 6127720 |
Semiconductor device and method for manufacturing the same |
Oct. 3, 2000 |
| 6040617 |
Structure to provide junction breakdown stability for deep trench devices |
Mar. 21, 2000 |
| 6020621 |
Stress-free shallow trench isolation |
Feb. 1, 2000 |
| 5994756 |
Substrate having shallow trench isolation |
Nov. 30, 1999 |
| 5990536 |
Integrated circuit arrangement having at least two mutually insulated components, and method for its production |
Nov. 23, 1999 |
| 5982017 |
Recessed structure for shallow trench isolation and salicide processes |
Nov. 9, 1999 |
| 5877539 |
Bipolar transistor with a reduced collector series resistance |
Mar. 2, 1999 |
| 5854509 |
Method of fabricating semiconductor device and semiconductor device |
Dec. 29, 1998 |
| 5635753 |
Integrated circuit |
Jun. 3, 1997 |
| 5583348 |
Method for making a schottky diode that is compatible with high performance transistor structures |
Dec. 10, 1996 |
| 5574305 |
Walled-emitter transistor |
Nov. 12, 1996 |
| 5573837 |
Masking layer having narrow isolated spacings and the method for forming said masking layer and the method for forming narrow isolated trenches defined by said masking layer |
Nov. 12, 1996 |
| 5548151 |
Hall element for detecting a magnetic field perpendicular to a substrate |
Aug. 20, 1996 |
| 5523614 |
Bipolar transistor having enhanced high speed operation through reduced base leakage current |
Jun. 4, 1996 |
| 5457338 |
Process for manufacturing isolated semi conductor components in a semi conductor wafer |
Oct. 10, 1995 |
| 5453640 |
Semiconductor integrated circuit having MOS memory and bipolar peripherals |
Sep. 26, 1995 |
| 5436475 |
Bipolar transistor for high power in the microwave range |
Jul. 25, 1995 |
| 5401998 |
Trench isolation using doped sidewalls |
Mar. 28, 1995 |
| 5350934 |
Conductivity modulation type insulated gate field effect transistor |
Sep. 27, 1994 |
| 5341023 |
Novel vertical-gate CMOS compatible lateral bipolar transistor |
Aug. 23, 1994 |
| 5332912 |
Heterojunction bipolar transistor |
Jul. 26, 1994 |
| 5266505 |
Image reversal process for self-aligned implants in planar epitaxial-base bipolar transistors |
Nov. 30, 1993 |
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