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Class Information
Number: 257/510
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Integrated circuit structure with electrically isolated components > Including dielectric isolation means > Combined with pn junction isolation (e.g., isoplanar, locos) > Dielectric in groove
Description: Subject matter wherein the electrical insulator material forming part of the isolation means is located in grooves in the semiconductor surface (e.g., LOCOS)
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7619294 |
Shallow trench isolation structure with low trench parasitic capacitance |
Nov. 17, 2009 |
| 7612427 |
Apparatus for confining inductively coupled surface currents |
Nov. 3, 2009 |
| 7608870 |
Isolation trench geometry for image sensors |
Oct. 27, 2009 |
| 7608908 |
Robust deep trench isolation |
Oct. 27, 2009 |
| 7605442 |
Semiconductor device |
Oct. 20, 2009 |
| 7605429 |
Hybrid crystal orientation CMOS structure for adaptive well biasing and for power and performance enhancement |
Oct. 20, 2009 |
| 7598590 |
Semiconductor chip and method for manufacturing the same and semiconductor device |
Oct. 6, 2009 |
| 7592676 |
Semiconductor device with a transistor having different source and drain lengths |
Sep. 22, 2009 |
| 7592684 |
Semiconductor device and method for manufacturing the same |
Sep. 22, 2009 |
| 7589391 |
Semiconductor device with STI and its manufacture |
Sep. 15, 2009 |
| 7586150 |
Semiconductor devices with local recess channel transistors and methods of manufacturing the same |
Sep. 8, 2009 |
| 7586158 |
Piezoelectric stress liner for bulk and SOI |
Sep. 8, 2009 |
| 7582949 |
Semiconductor devices |
Sep. 1, 2009 |
| 7582947 |
High performance device design |
Sep. 1, 2009 |
| 7582935 |
Methods for manufacturing SOI substrate using wafer bonding and complementary high voltage bipolar transistor using the SOI substrate |
Sep. 1, 2009 |
| 7572713 |
Method of fabricating semiconductor device with STI structure |
Aug. 11, 2009 |
| 7560357 |
Method for creating narrow trenches in dielectric materials |
Jul. 14, 2009 |
| 7556990 |
CMOS image sensor having improved signal efficiency and method for manufacturing the same |
Jul. 7, 2009 |
| 7557415 |
Trench isolation type semiconductor device and related method of manufacture |
Jul. 7, 2009 |
| 7557422 |
Semiconductor device with STI structure |
Jul. 7, 2009 |
| 7550816 |
Filled trench isolation structure |
Jun. 23, 2009 |
| 7550815 |
Semiconductor device and method of producing the same |
Jun. 23, 2009 |
| 7550343 |
Forming a semiconductor structure in manufacturing a semiconductor device using one or more epitaxial growth processes |
Jun. 23, 2009 |
| 7544607 |
Semiconductor device having thin film formed by atomic layer deposition and method for fabricating the same |
Jun. 9, 2009 |
| 7541298 |
STI of a semiconductor device and fabrication method thereof |
Jun. 2, 2009 |
| 7541629 |
Embedded insulating band for controlling short-channel effect and leakage reduction for DSB process |
Jun. 2, 2009 |
| 7538409 |
Semiconductor devices |
May. 26, 2009 |
| 7535077 |
Method for manufacturing a semiconductor device including a shallow trench isolation structure |
May. 19, 2009 |
| 7525186 |
Stack package having guard ring which insulates through-via interconnection plug and method for manufacturing the same |
Apr. 28, 2009 |
| 7521763 |
Dual stress STI |
Apr. 21, 2009 |
| 7518210 |
Trench isolated integrated circuit devices including grooves |
Apr. 14, 2009 |
| 7504704 |
Shallow trench isolation process |
Mar. 17, 2009 |
| 7504697 |
Rotational shear stress for charge carrier mobility modification |
Mar. 17, 2009 |
| 7501686 |
Semiconductor device and method for manufacturing the same |
Mar. 10, 2009 |
| 7501691 |
Trench insulation structures including an oxide liner and oxidation barrier |
Mar. 10, 2009 |
| 7495308 |
Semiconductor device with trench isolation |
Feb. 24, 2009 |
| 7485943 |
Dielectric isolation type semiconductor device and manufacturing method therefor |
Feb. 3, 2009 |
| 7482662 |
High voltage semiconductor device utilizing a deep trench structure |
Jan. 27, 2009 |
| 7482656 |
Method and structure to form self-aligned selective-SOI |
Jan. 27, 2009 |
| 7482671 |
MOS semiconductor device isolated by a device isolation film |
Jan. 27, 2009 |
| 7479688 |
STI stress modification by nitrogen plasma treatment for improving performance in small width devices |
Jan. 20, 2009 |
| 7476938 |
Transistor having dielectric stressor elements at different depths from a semiconductor surface for applying shear stress |
Jan. 13, 2009 |
| 7466005 |
Recessed termination for trench schottky device without junction curvature |
Dec. 16, 2008 |
| 7462907 |
Method of increasing erase speed in memory arrays |
Dec. 9, 2008 |
| 7453135 |
Semiconductor device and method of manufacturing the same |
Nov. 18, 2008 |
| 7449763 |
Method of fabricating cell of nonvolatile memory device with floating gate |
Nov. 11, 2008 |
| 7439605 |
Semiconductor device and method for manufacturing the same |
Oct. 21, 2008 |
| 7439604 |
Method of forming dual gate dielectric layer |
Oct. 21, 2008 |
| 7439602 |
Semiconductor device and its manufacturing method |
Oct. 21, 2008 |
| 7439587 |
Semiconductor device and method of manufacturing the same |
Oct. 21, 2008 |
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