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Class Information
Number: 257/508
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Integrated circuit structure with electrically isolated components > Including dielectric isolation means > With metallic conductor within isolating dielectric or between semiconductor and isolating dielectric (e.g., metal shield layer or internal connection layer)
Description: Subject matter wherein a metallic (metal or metal-like) conductor is located within the region of electrical insulator material which isolates the components on the chip from each other or is provided between the single crystal semiconductor material of the semiconductor components and the electrical insulator material forming the dielectric isolation.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7615841 |
Design structure for coupling noise prevention |
Nov. 10, 2009 |
| 7612453 |
Semiconductor device having an interconnect structure and a reinforcing insulating film |
Nov. 3, 2009 |
| 7608928 |
Laminated body and semiconductor device |
Oct. 27, 2009 |
| 7601994 |
Display device and method for manufacturing the same |
Oct. 13, 2009 |
| 7598597 |
Segmented magnetic shielding elements |
Oct. 6, 2009 |
| 7589390 |
Shielded through-via |
Sep. 15, 2009 |
| 7576390 |
System for vertical DMOS with slots |
Aug. 18, 2009 |
| 7569915 |
Shielding arrangement to protect a circuit from stray magnetic fields |
Aug. 4, 2009 |
| 7566945 |
Semiconductor devices including nanotubes |
Jul. 28, 2009 |
| 7564115 |
Tapered through-silicon via structure |
Jul. 21, 2009 |
| 7560793 |
Atomic layer deposition and conversion |
Jul. 14, 2009 |
| 7560800 |
Die seal with reduced noise coupling |
Jul. 14, 2009 |
| 7550805 |
Stress-controlled dielectric integrated circuit |
Jun. 23, 2009 |
| 7550850 |
Semiconductor device |
Jun. 23, 2009 |
| 7545019 |
Integrated circuit including logic portion and memory portion |
Jun. 9, 2009 |
| 7525174 |
High performance system-on-chip using post passivation process |
Apr. 28, 2009 |
| 7518218 |
Total ionizing dose suppression transistor architecture |
Apr. 14, 2009 |
| 7504699 |
Fabrication of a semiconductor device with air gaps for ultra-low capacitance interconnections |
Mar. 17, 2009 |
| 7501690 |
Semiconductor ground shield method |
Mar. 10, 2009 |
| 7485942 |
Films deposited at glancing incidence for multilevel metallization |
Feb. 3, 2009 |
| 7479687 |
Deep via seed repair using electroless plating chemistry |
Jan. 20, 2009 |
| 7479690 |
Semiconductor device |
Jan. 20, 2009 |
| 7473976 |
Lateral power transistor with self-biasing electrodes |
Jan. 6, 2009 |
| 7466007 |
Post passivation interconnection schemes on top of IC chip |
Dec. 16, 2008 |
| 7439604 |
Method of forming dual gate dielectric layer |
Oct. 21, 2008 |
| 7382015 |
Semiconductor device including an element isolation portion having a recess |
Jun. 3, 2008 |
| 7375411 |
Method and structure for forming relatively dense conductive layers |
May. 20, 2008 |
| 7358560 |
Flash memory device and method of manufacturing the same |
Apr. 15, 2008 |
| 7358587 |
Semiconductor structures |
Apr. 15, 2008 |
| 7352048 |
Integration of barrier layer and seed layer |
Apr. 1, 2008 |
| 7345339 |
Vertical channel FET with super junction construction |
Mar. 18, 2008 |
| 7339250 |
Semiconductor integrated circuit having reduced cross-talk noise |
Mar. 4, 2008 |
| 7335964 |
Semiconductor structures |
Feb. 26, 2008 |
| 7329620 |
System and method for providing an integrated circuit having increased radiation hardness and reliability |
Feb. 12, 2008 |
| 7309908 |
Standard cell, semiconductor integrated circuit device of standard cell scheme and layout design method for semiconductor integrated circuit device |
Dec. 18, 2007 |
| 7304352 |
Alignment insensitive D-cache cell |
Dec. 4, 2007 |
| 7301207 |
Semiconductor device capable of threshold voltage adjustment by applying an external voltage |
Nov. 27, 2007 |
| 7291895 |
Integrated circuitry |
Nov. 6, 2007 |
| 7291894 |
Vertical charge control semiconductor device with low output capacitance |
Nov. 6, 2007 |
| 7262456 |
Bit line structure and production method thereof |
Aug. 28, 2007 |
| 7262486 |
SOI substrate and method for manufacturing the same |
Aug. 28, 2007 |
| 7259441 |
Hollow structure in an integrated circuit and method for producing such a hollow structure in an integrated circuit |
Aug. 21, 2007 |
| 7253486 |
Field plate transistor with reduced field plate resistance |
Aug. 7, 2007 |
| 7241640 |
Solder ball assembly for a semiconductor device and method of fabricating same |
Jul. 10, 2007 |
| 7239003 |
Isolation techniques for reducing dark current in CMOS image sensors |
Jul. 3, 2007 |
| 7235855 |
Semiconductor device having a layout configuration for minimizing crosstalk |
Jun. 26, 2007 |
| 7214572 |
Semiconductor memory device and manufacturing method thereof |
May. 8, 2007 |
| 7184293 |
Crosspoint-type ferroelectric memory |
Feb. 27, 2007 |
| 7170109 |
Heterojunction semiconductor device with element isolation structure |
Jan. 30, 2007 |
| 7122850 |
Semiconductor device having local interconnection layer and etch stopper pattern for preventing leakage of current |
Oct. 17, 2006 |
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