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Class Information
Number: 257/497
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Punchthrough structure device (e.g., punchthrough transistor, camel barrier diode)
Description: Subject matter having at least one active pn, Schottky barrier, or other rectifying junction which can be reverse biased to produce a depletion layer, the active junction being spaced from a second junction by a layer of semiconductor material in which the depletion region extending from the active junction is produced, the second junction being one capable of supplying minority carriers to the layer of semiconductor material upon forward bias of the second junction, and in which the second junction is located sufficiently close to the active junction that the depletion region from the active junction can reach the second junction, thereby forward biasing the second junction and causing the injection of minority carriers therefrom which traverse the depletion layer and reach the active junction.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7164183 |
Semiconductor substrate, semiconductor device, and method of manufacturing the same |
Jan. 16, 2007 |
| 7138699 |
Semiconductor integrated circuit and noncontact information medium |
Nov. 21, 2006 |
| 7126191 |
Double-diffused semiconductor device |
Oct. 24, 2006 |
| 6963094 |
Metal oxide semiconductor transistors having a drain punch through blocking region and methods for fabricating metal oxide semiconductor transistors having a drain punch through blocking regio |
Nov. 8, 2005 |
| 6949423 |
MOSFET-fused nonvolatile read-only memory cell (MOFROM) |
Sep. 27, 2005 |
| 6949439 |
Semiconductor power component and a method of producing same |
Sep. 27, 2005 |
| 6919625 |
Surface mount multichip devices |
Jul. 19, 2005 |
| 6897095 |
Semiconductor process and integrated circuit having dual metal oxide gate dielectric with single metal gate electrode |
May. 24, 2005 |
| 6833594 |
Semiconductor integrated circuit device and manufacture method therefore |
Dec. 21, 2004 |
| RE38608 |
Low-voltage punch-through transient suppressor employing a dual-base structure |
Oct. 5, 2004 |
| 6791411 |
Power amplifier and a method for operating a power amplifier |
Sep. 14, 2004 |
| 6602769 |
Low-voltage punch-through bi-directional transient-voltage suppression devices and methods of making the same |
Aug. 5, 2003 |
| 6600204 |
Low-voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same |
Jul. 29, 2003 |
| 6597052 |
Punch-through diode having an inverted structure |
Jul. 22, 2003 |
| 6534834 |
Polysilicon bounded snapback device |
Mar. 18, 2003 |
| 6528858 |
MOSFETs with differing gate dielectrics and method of formation |
Mar. 4, 2003 |
| 6489660 |
Low-voltage punch-through bi-directional transient-voltage suppression devices |
Dec. 3, 2002 |
| 6459133 |
Enhanced flux semiconductor device with mesa and method of manufacturing same |
Oct. 1, 2002 |
| 6388302 |
Ground compatible inhibit circuit |
May. 14, 2002 |
| 6388319 |
Three commonly housed diverse semiconductor dice |
May. 14, 2002 |
| 6369440 |
Semiconductor substrate and manufacturing method thereof |
Apr. 9, 2002 |
| 6344658 |
Gunn diode, NRD guide gunn oscillator, fabricating method of gunn diode and structure for assembly of the same |
Feb. 5, 2002 |
| 6300656 |
Nonvolatile semiconductor memory device having a drain region of different impurity density and conductivity types |
Oct. 9, 2001 |
| 6297552 |
Commonly housed diverse semiconductor die |
Oct. 2, 2001 |
| 6262466 |
Lateral semiconductor structure for forming a temperature-compensated voltage limitation |
Jul. 17, 2001 |
| 6200841 |
MOS transistor that inhibits punchthrough and method for fabricating the same |
Mar. 13, 2001 |
| 6188110 |
Integration of isolation with epitaxial growth regions for enhanced device formation |
Feb. 13, 2001 |
| 6172402 |
Integrated circuit having transistors that include insulative punchthrough regions and method of formation |
Jan. 9, 2001 |
| 6015999 |
Low-voltage punch-through transient suppressor employing a dual-base structure |
Jan. 18, 2000 |
| 5994760 |
Device having a low threshold voltage for protection against electrostatic discharges |
Nov. 30, 1999 |
| 5986304 |
Punch-through prevention in trenched DMOS with poly-silicon layer covering trench corners |
Nov. 16, 1999 |
| 5977602 |
Semiconductor device having an oxygen-rich punchthrough region extending through the length of the active region |
Nov. 2, 1999 |
| 5936265 |
Semiconductor device including a tunnel effect element |
Aug. 10, 1999 |
| 5929502 |
Level shifter stage with punch through diode |
Jul. 27, 1999 |
| 5929503 |
Punch-through diodes and applications |
Jul. 27, 1999 |
| 5880511 |
Low-voltage punch-through transient suppressor employing a dual-base structure |
Mar. 9, 1999 |
| 5841172 |
SOI input protection circuit |
Nov. 24, 1998 |
| 5814884 |
Commonly housed diverse semiconductor die |
Sep. 29, 1998 |
| 5514894 |
Protection circuit device for a semiconductor integrated circuit device |
May. 7, 1996 |
| 5486709 |
Surge protection device |
Jan. 23, 1996 |
| 5406111 |
Protection device for an intergrated circuit and method of formation |
Apr. 11, 1995 |
| 5369291 |
Voltage controlled thyristor |
Nov. 29, 1994 |
| 5365103 |
Punchthru ESD device along centerline of power pad |
Nov. 15, 1994 |
| 5324983 |
Semiconductor device |
Jun. 28, 1994 |
| 5233214 |
Controllable, temperature-compensated voltage limiter |
Aug. 3, 1993 |
| 4974037 |
Semiconductor arrangement with depletion layer majority carrier barrier |
Nov. 27, 1990 |
| 4896201 |
Semiconductor detector having integrated coupling capacitors and intergrated dc biasing structures |
Jan. 23, 1990 |
| 4876580 |
Tunnel injection controlling type semiconductor device controlled by static induction effect |
Oct. 24, 1989 |
| 4875084 |
Optoelectric transducer |
Oct. 17, 1989 |
| 4862238 |
Transistors |
Aug. 29, 1989 |
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