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Class Information
Number: 257/390
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Field effect device > Having insulated electrode (e.g., mosfet, mos diode) > Insulated gate field effect transistor in integrated circuit > Matrix or array of field effect transistors (e.g., array of fets only some of which are completed, or structure for mask programmed read-only memory (rom))
Description: Subject matter wherein the integrated circuit contains a two dimensional array of IGFETs, only some of which are completed devices, or the integrated circuit contains structure for a mask programmed read-only memory device.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6265746 |
Highly resistive interconnects |
Jul. 24, 2001 |
| 6265748 |
Storage cell arrangement in which vertical MOS transistors have at least three different threshold voltages depending on stored data, and method of producing said arrangement |
Jul. 24, 2001 |
| 6262447 |
Single polysilicon DRAM cell and array with current gain |
Jul. 17, 2001 |
| 6262455 |
Method of forming dual gate oxide layers of varying thickness on a single substrate |
Jul. 17, 2001 |
| 6259143 |
Semiconductor memory device of NOR type mask ROM and manufacturing method of the same |
Jul. 10, 2001 |
| 6251732 |
Method and apparatus for forming self-aligned code structures for semi conductor devices |
Jun. 26, 2001 |
| 6229157 |
Method of forming a polysilicon diode and devices incorporating such diode |
May. 8, 2001 |
| 6229186 |
Semiconductor memory device using inverter configuration |
May. 8, 2001 |
| 6229172 |
Semiconductor device and manufacturing method thereof |
May. 8, 2001 |
| 6222212 |
Semiconductor device having programmable interconnect layers |
Apr. 24, 2001 |
| 6218265 |
Process for fabricating a semiconductor non-volatile memory device with shallow trench isolation (STI) |
Apr. 17, 2001 |
| 6211546 |
Method of manufacturing nonvolatile semiconductor memory device |
Apr. 3, 2001 |
| 6211019 |
Read-only memory cell device and method for its production |
Apr. 3, 2001 |
| 6208546 |
Memory module |
Mar. 27, 2001 |
| 6207999 |
Double coding mask read only memory (mask ROM) for minimizing band-to-band leakage |
Mar. 27, 2001 |
| 6204541 |
Semiconductor memory |
Mar. 20, 2001 |
| 6204542 |
Field effect transistor with improved driving capability |
Mar. 20, 2001 |
| 6204540 |
Memory cell structure of a mask programmable read only memory with ion-implantation stopper films |
Mar. 20, 2001 |
| 6201277 |
Slot trench isolation for flash EPROM |
Mar. 13, 2001 |
| 6201282 |
Two bit ROM cell and process for producing same |
Mar. 13, 2001 |
| 6198658 |
High density flash memory architecture with columnar substrate coding |
Mar. 6, 2001 |
| 6194767 |
X-ROM semiconductor memory device |
Feb. 27, 2001 |
| 6191459 |
Electrically programmable memory cell array, using charge carrier traps and insulation trenches |
Feb. 20, 2001 |
| 6177709 |
Cell based array having compute/drive ratios of N:1 |
Jan. 23, 2001 |
| 6177694 |
Dynamic random access memory device |
Jan. 23, 2001 |
| 6177691 |
Cell based array having compute drive ratios of N:1 |
Jan. 23, 2001 |
| 6169314 |
Layout pattern for improved MOS device matching |
Jan. 2, 2001 |
| 6169313 |
Static semiconductor memory device |
Jan. 2, 2001 |
| 6165851 |
Semiconductor nonvolatile storage and method of fabricating the same |
Dec. 26, 2000 |
| 6160297 |
Semiconductor memory device having a first source line arranged between a memory cell string and bit lines in the direction crossing the bit lines and a second source line arranged in parallel |
Dec. 12, 2000 |
| 6160295 |
CMOS device |
Dec. 12, 2000 |
| 6157069 |
Highly integrated mask ROM for coding data |
Dec. 5, 2000 |
| 6153918 |
Semiconductor device with improved planarity and reduced parasitic capacitance |
Nov. 28, 2000 |
| 6150700 |
Advanced nor-type mask ROM |
Nov. 21, 2000 |
| 6150679 |
FIFO architecture with built-in intelligence for use in a graphics memory system for reducing paging overhead |
Nov. 21, 2000 |
| 6147385 |
CMOS static random access memory devices |
Nov. 14, 2000 |
| 6144078 |
Methods for programming read-only memory cells and associated memories |
Nov. 7, 2000 |
| 6140687 |
High frequency ring gate MOSFET |
Oct. 31, 2000 |
| 6136677 |
Method of fabricating semiconductor chips with silicide and implanted junctions |
Oct. 24, 2000 |
| 6133101 |
Low mask count process to fabricate mask read only memory devices |
Oct. 17, 2000 |
| 6133602 |
Method of reducing dielectric damage due to charging in the fabrication of stacked gate structures |
Oct. 17, 2000 |
| 6130447 |
Integrated circuit memories and power distribution methods including at least two control lines between adjacent power lines |
Oct. 10, 2000 |
| 6121664 |
Semiconductor memory device |
Sep. 19, 2000 |
| 6121079 |
Method for manufacturing a semiconductor memory device |
Sep. 19, 2000 |
| 6121643 |
Semiconductor device having a group of high performance transistors and method of manufacture thereof |
Sep. 19, 2000 |
| 6118159 |
Electrically programmable memory cell configuration |
Sep. 12, 2000 |
| 6114767 |
EEPROM semiconductor device and method of fabricating the same |
Sep. 5, 2000 |
| 6107666 |
High density ROM and a method of making the same |
Aug. 22, 2000 |
| 6107661 |
Semiconductor device and method of manufacturing same |
Aug. 22, 2000 |
| 6096664 |
Method of manufacturing semiconductor structures including a pair of MOSFETs |
Aug. 1, 2000 |
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