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Class Information
Number: 257/390
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Field effect device > Having insulated electrode (e.g., mosfet, mos diode) > Insulated gate field effect transistor in integrated circuit > Matrix or array of field effect transistors (e.g., array of fets only some of which are completed, or structure for mask programmed read-only memory (rom))
Description: Subject matter wherein the integrated circuit contains a two dimensional array of IGFETs, only some of which are completed devices, or the integrated circuit contains structure for a mask programmed read-only memory device.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5132771 |
Semiconductor memory device having flip-flop circuits |
Jul. 21, 1992 |
| 5128738 |
Integrated circuit |
Jul. 7, 1992 |
| 5124768 |
Thin film transistor and active matrix assembly including same |
Jun. 23, 1992 |
| 5121178 |
Silicon thin film transistor |
Jun. 9, 1992 |
| 5121177 |
Silicon thin film transistor |
Jun. 9, 1992 |
| 5117389 |
Flat-cell read-only-memory integrated circuit |
May. 26, 1992 |
| 5115293 |
Solid-state imaging device |
May. 19, 1992 |
| 5111261 |
Silicon thin film transistor with an intrinsic silicon active layer formed within the boundary defined by the edges of the gate electrode and the impurity containing silicon layer |
May. 5, 1992 |
| 5101258 |
Semiconductor integrated circuit device of master slice approach |
Mar. 31, 1992 |
| 5101248 |
Semiconductor device |
Mar. 31, 1992 |
| 5101262 |
Semiconductor memory device and method of manufacturing it |
Mar. 31, 1992 |
| 5083178 |
Semiconductor CMOS gate array |
Jan. 21, 1992 |
| 5081052 |
ROM and process for producing the same |
Jan. 14, 1992 |
| 5079614 |
Gate array architecture with basic cell interleaved gate electrodes |
Jan. 7, 1992 |
| 5079611 |
Semiconductor integrated circuit device and process for fabricating the same |
Jan. 7, 1992 |
| 5075746 |
Thin film field effect transistor and a method of manufacturing the same |
Dec. 24, 1991 |
| 5072269 |
Dynamic ram and method of manufacturing the same |
Dec. 10, 1991 |
| 5068696 |
Programmable interconnect or cell using silicided MOS transistors |
Nov. 26, 1991 |
| 5067001 |
Structure and method for manufacturing a series read only memory with spacer film |
Nov. 19, 1991 |
| 5065202 |
Amorphous silicon thin film transistor array substrate and method for producing the same |
Nov. 12, 1991 |
| 5063170 |
Semiconductor integrated circuit device and a method of producing the same |
Nov. 5, 1991 |
| 5060046 |
Semiconductor integrated circuit device having enlarged cells formed on ends of basic cell arrays |
Oct. 22, 1991 |
| 5051809 |
Memory cell array of planar cell structure |
Sep. 24, 1991 |
| 5051796 |
Cross-point contact-free array with a high-density floating-gate structure |
Sep. 24, 1991 |
| 5047819 |
Amorphous-silicon thin film transistor array substrate |
Sep. 10, 1991 |
| 5045899 |
Dynamic random access memory having stacked capacitor structure |
Sep. 3, 1991 |
| 5041884 |
Multilayer semiconductor integrated circuit |
Aug. 20, 1991 |
| 5040034 |
Semiconductor device |
Aug. 13, 1991 |
| 5038192 |
Gate array cell having FETs of different and optimized sizes |
Aug. 6, 1991 |
| 5032889 |
Wiring structure in a wafer-scale integrated circuit |
Jul. 16, 1991 |
| 5031018 |
Basic cell of gate array device |
Jul. 9, 1991 |
| 5031011 |
MOS type semiconductor device |
Jul. 9, 1991 |
| 5027175 |
Integrated circuit semiconductor device having improved wiring structure |
Jun. 25, 1991 |
| 5025294 |
Metal insulator semiconductor type dynamic random access memory device |
Jun. 18, 1991 |
| 5025494 |
Cross-point contact-free floating-gate memory array with silicided buried bitlines |
Jun. 18, 1991 |
| 5023680 |
Floating-gate memory array with silicided buried bitlines and with single-step-defined floating gates |
Jun. 11, 1991 |
| 5023681 |
Method for arranging EEPROM cells and a semiconductor device manufactured by the method |
Jun. 11, 1991 |
| 5021847 |
Split gate memory array having staggered floating gate rows and method for making same |
Jun. 4, 1991 |
| 5021850 |
Silicon thin film transistor |
Jun. 4, 1991 |
| 5019878 |
Programmable interconnect or cell using silicided MOS transistors |
May. 28, 1991 |
| 5017978 |
EPROM having a reduced number of contacts |
May. 21, 1991 |
| 5016071 |
Dynamic memory device |
May. 14, 1991 |
| 5014243 |
Programmable read only memory (PROM) having circular shaped emitter regions |
May. 7, 1991 |
| 5005060 |
Tablecloth memory matrix with staggered EPROM cells |
Apr. 2, 1991 |
| 5003356 |
Thin film transistor array |
Mar. 26, 1991 |
| 4990999 |
Semiconductor memory device using high-density and high-speed MOS elements |
Feb. 5, 1991 |
| 4990489 |
Read only memory device including a superconductive electrode |
Feb. 5, 1991 |
| 4974042 |
Semiconductor memory device with compact ROM memory cells |
Nov. 27, 1990 |
| 4940934 |
Method of electrically testing active matrix substrate |
Jul. 10, 1990 |
| 4933736 |
Programmable read-only memory |
Jun. 12, 1990 |
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