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Class Information
Number: 257/382
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Field effect device > Having insulated electrode (e.g., mosfet, mos diode) > Insulated gate field effect transistor in integrated circuit > With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide)
Description: Subject matter wherein the device has an electrical contact to its source region or drain region wherein the contact is made of a refractory or platinum group metal, or of other material which has a melting point above that of the iron group of metals and which is resistant to heat (e.g., of polysilicon, tungsten or silicide).
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5235203 |
Insulated gate field effect transistor having vertically layered elevated source/drain structure |
Aug. 10, 1993 |
| 5227652 |
Electrically programmable and erasable semiconductor memory and method of operating same |
Jul. 13, 1993 |
| 5227333 |
Local interconnection having a germanium layer |
Jul. 13, 1993 |
| 5206532 |
Buried contact between polysilicon gate and diffusion area |
Apr. 27, 1993 |
| 5194752 |
Semiconductor memory device |
Mar. 16, 1993 |
| 5191397 |
SOI semiconductor device with a wiring electrode contacts a buried conductor and an impurity region |
Mar. 2, 1993 |
| 5182619 |
Semiconductor device having an MOS transistor with overlapped and elevated source and drain |
Jan. 26, 1993 |
| 5177568 |
Tunnel injection semiconductor devices with Schottky barriers |
Jan. 5, 1993 |
| 5172208 |
Thyristor |
Dec. 15, 1992 |
| 5166763 |
Static type semiconductor memory device and method of manufacturing thereof |
Nov. 24, 1992 |
| 5159430 |
Vertically integrated oxygen-implanted polysilicon resistor |
Oct. 27, 1992 |
| 5136355 |
Interconnecting layer on a semiconductor substrate |
Aug. 4, 1992 |
| 5109258 |
Memory cell made by selective oxidation of polysilicon |
Apr. 28, 1992 |
| 5103285 |
Silicon carbide barrier between silicon substrate and metal layer |
Apr. 7, 1992 |
| 5100816 |
Method of forming a field effect transistor on the surface of a substrate |
Mar. 31, 1992 |
| 5101262 |
Semiconductor memory device and method of manufacturing it |
Mar. 31, 1992 |
| 5089872 |
Selective germanium deposition on silicon and resulting structures |
Feb. 18, 1992 |
| 5061981 |
Double diffused CMOS with Schottky to drain contacts |
Oct. 29, 1991 |
| 5049975 |
Multi-layered interconnection structure for a semiconductor device |
Sep. 17, 1991 |
| 5045901 |
Double diffusion metal-oxide-semiconductor device having shallow source and drain diffused regions |
Sep. 3, 1991 |
| 5043778 |
Oxide-isolated source/drain transistor |
Aug. 27, 1991 |
| 4998151 |
Power field effect devices having small cell size and low contact resistance |
Mar. 5, 1991 |
| 4980734 |
Dynamic memory cell using silicon-on-insulator transistor with trench capacitor |
Dec. 25, 1990 |
| 4954871 |
Semiconductor device with composite electrode |
Sep. 4, 1990 |
| 4954865 |
Integrated circuits |
Sep. 4, 1990 |
| 4952993 |
Semiconductor device and manufacturing method thereof |
Aug. 28, 1990 |
| 4951103 |
Fast, trench isolated, planar flash EEPROMS with silicided bitlines |
Aug. 21, 1990 |
| 4951100 |
Hot electron collector for a LDD transistor |
Aug. 21, 1990 |
| 4942448 |
Structure for isolating semiconductor components on an integrated circuit and a method of manufacturing therefor |
Jul. 17, 1990 |
| 4933737 |
Polysilon contacts to IC mesas |
Jun. 12, 1990 |
| 4929992 |
MOS transistor construction with self aligned silicided contacts to gate, source, and drain regions |
May. 29, 1990 |
| 4923822 |
Method of fabricating a semiconductor device by capping a conductive layer with a nitride layer |
May. 8, 1990 |
| 4922311 |
Folded extended window field effect transistor |
May. 1, 1990 |
| 4914501 |
Vertical contact structure |
Apr. 3, 1990 |
| 4914050 |
Semiconductor device and manufacturing method thereof |
Apr. 3, 1990 |
| 4892841 |
Method of manufacturing a read only semiconductor memory device |
Jan. 9, 1990 |
| 4885627 |
Method and structure for reducing resistance in integrated circuits |
Dec. 5, 1989 |
| 4879255 |
Method for fabricating bipolar-MOS devices |
Nov. 7, 1989 |
| 4862232 |
Transistor structure for high temperature logic circuits with insulation around source and drain regions |
Aug. 29, 1989 |
| 4859630 |
Method of manufacturing a semiconductor device |
Aug. 22, 1989 |
| 4853342 |
Method of manufacturing semiconductor integrated circuit device having transistor |
Aug. 1, 1989 |
| 4830971 |
Method for manufacturing a semiconductor device utilizing self-aligned contact regions |
May. 16, 1989 |
| 4826782 |
Method of fabricating aLDD field-effect transistor |
May. 2, 1989 |
| 4822749 |
Self-aligned metallization for semiconductor device and process using selectively deposited tungsten |
Apr. 18, 1989 |
| 4814854 |
Integrated circuit device and process with tin-gate transistor |
Mar. 21, 1989 |
| 4811078 |
Integrated circuit device and process with tin capacitors |
Mar. 7, 1989 |
| 4811076 |
Device and process with doubled capacitors |
Mar. 7, 1989 |
| 4797717 |
Semiconductor memory device |
Jan. 10, 1989 |
| 4788160 |
Process for formation of shallow silicided junctions |
Nov. 29, 1988 |
| 4785337 |
Dynamic ram cell having shared trench storage capacitor with sidewall-defined bridge contacts and gate electrodes |
Nov. 15, 1988 |
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